ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 70

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

I/O ports
10.2.3
Caution:
70/188
Alternate functions
Many ST7s I/Os have one or more alternate functions. These may include output signals
from, or input signals to, on-chip
be input/output to which ports.
A signal coming from an on-chip peripheral can be output on an I/O. To do this, enable the
on-chip peripheral as an output (enable bit in the peripheral’s control register). The
peripheral configures the I/O as an output and takes priority over standard I/O programming.
The I/O’s state is readable by addressing the corresponding I/O data register.
Configuring an I/O as floating enables alternate function input. It is not recommended to
configure an I/O as pull-up as this will increase current consumption. Before using an I/O as
an alternate input, configure it without interrupt. Otherwise spurious interrupts can occur.
Configure an I/O as input floating for an on-chip peripheral signal which can be input and
output.
I/Os which can be configured as both an analog and digital alternate function need special
attention. The user must control the peripherals so that the signals do not arrive at the same
time on the same pin. If an external clock is used, only the clock alternate function should be
employed on that I/O pin and not the other alternate function.
Figure 34. I/O port general block diagram
REGISTER
ACCESS
EXTERNAL
INTERRUPT
REQUEST (ei
DDR SEL
OR SEL
DR SEL
DDR
OR
DR
x
)
SENSITIVITY
SELECTION
ALTERNATE
OUTPUT
From on-chip periphera
ALTERNATE
ENABLE
BIT
If implemented
1
0
Combinational
Logic
Doc ID 13562 Rev 3
l
peripherals.Table 2
1
0
FROM
OTHER
BITS
Note: Refer to the Port Configuration
table for device specific information.
N-BUFFER
PULL-UP
CONDITION
describes which peripheral signals can
SCHMITT
TRIGGER
CMOS
V
DD
P-BUFFER
(see table below)
To on-chip peripheral
V
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
INPUT
PAD
ST7LITE49M