ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 87

• Manufacturer Part Number: ST7LITE49M
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49M

• 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10k write/erase cycles guaranteed Data retention
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
• A/d Converter: 10 input channels

ST7LITE49M
Since the input capture flags (ICF) for both timers (AT4 timer and LT timer) are set when
signal transition occurs, software must mask one interrupt by clearing the corresponding
ICIE bit before setting the ICS bit.
If the ICS bit changes (from 0 to 1 or from 1 to 0), a spurious transition might occur on the
Input Capture signal because of different values on LTIC and ATIC. To avoid this situation, it
is recommended to do as follows:
1.
2.
3.
4.
Computing a pulse length in long input capture mode is not straightforward since both timers
are used. The following steps are required:
1.
2.
Now pulse width P between first capture and second capture is given by:
First, reset both ICIE bits.
Then set the ICS bit.
Reset both ICF bits.
And then set the ICIE bit of desired interrupt.
At the first input capture on the rising edge of the pulse, we assume that values in the
registers are the following:
–
–
–
–
At the second input capture on the falling edge of the pulse, we assume that the values
in the registers are as follows:
–
–
–
–
where N is the number of overflows of 12-bit CNTR1.
LTICR = LT1
ATICRH = ATH1
ATICRL = ATL1
Hence ATICR1 [11:0] = ATH1 & ATL1. Refer to
LTICR = LT2
ATICRH = ATH2
ATICRL = ATL2
Hence ATICR2 [11:0] = ATH2 & ATL2.
P
+
decimal FFF
=
decimal
(
(
×
Doc ID 13562 Rev 3
(
F9 LT1
×
N
–
)
+
N
+
+
LT2
ATICR2 ATICR1
+
1
)
×
–
0.004ms
Figure 48 on page
–
1
)
×
On-chip peripherals
1ms
88.
87/188