ST7LITE49M STMicroelectronics, ST7LITE49M Datasheet - Page 95
ST7LITE49M
Manufacturer Part Number
ST7LITE49M
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITE49M.pdf
(187 pages)
Specifications of ST7LITE49M
4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10k write/erase cycles guaranteed Data retention
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
A/d Converter
10 input channels
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ST7LITE49M
PWMX control status register (PWMxCSR)
Reset value: 0000 0000 (00h)
Bits 7:4= Reserved, must be kept cleared.
Bit 3 = OP_EN One-pulse mode enable bit
Bit 2 = OPEDGE One-pulse edge selection bit
Bit 1 = OPx PWMx output polarity bit
Bit 0 = CMPFx PWMx compare flag
Break control register (BREAKCR)
Reset value: 0000 0000 (00h)
Bit 7 = Reserved
This bit is read/write by software and cleared by hardware after a reset. This bit enables
the One-pulse feature for PWM2 and PWM3 (only available for PWM3CSR)
0: One-pulse mode disable for PWM2/3.
1: One-pulse mode enable for PWM2/3.
This bit is read/write by software and cleared by hardware after a reset. This bit selects
the polarity of the LTIC signal for One-pulse feature. This bit will be effective only if
OP_EN bit is set (only available for PWM3CSR)
0: Falling edge of LTIC is selected.
1: Rising edge of LTIC is selected.
This bit is read/write by software and cleared by hardware after a reset. This bit selects
the polarity of the PWM signal.
0: The PWM signal is not inverted.
1: The PWM signal is inverted.
This bit is set by hardware and cleared by software by reading the PWMxCSR register.
It indicates that the upcounter value matches the Active DCRx register value.
0: Upcounter value does not match DCRx value.
1: Upcounter value matches DCRx value.
7
0
7
0
BREDGE
0
BA
0
Doc ID 13562 Rev 3
BPEN
0
Read/write
Read/write
OP_EN
PWM3
OPEDGE
PWM2
On-chip peripherals
OPx
PWM1
CMPFx
PWM0
0
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