TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 101

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Comparator output
Example: To output a 2.4
(Matching detect)
TRUN
T32MOD
TREG3
TFFCR
P8CR
P8FC
TRUN
Up-counter clear
Up counter
Comparator
Bit7 to Bit2
<T3RUN>
procedures. Either timer 2 or timer 3 may be used, but this example uses timer 3.
INTT3
timing
TRUN
Figure 3.7.10 Square Wave (50% duty) Output Timing Chart
TFF3
TO3
Bit1
Bit0
φT1
← − X − − 0 − − −
← 0 0 X X 0 1 − −
← 0 0 0 0 0 0 1 1
← 1 0 1 1 − − − −
← − − − − 1 − − −
← X X X X 1 X X −
← 1 X − − 1 − − −
X: Don’t care, −: No change
*
7 6 5 4 3 2 1 0
0
Clock condition
µ
s square wave pulse from the TO3 pin at fc = 20 MHz, set each register by the following
1
2
93CS20-99
3
0
1.2 µs at fc = 20 MHz
System clock:
Clock gear:
Prescaler clock: f
Stop timer 3, and clear it to 0.
Set the 8-bit timer mode, and select φT1 (0.4 µs at fc = 20
MHz) as the input clock cycle time.
Set the timer register at 2.4 µs ÷ φT1 ÷ 2 = 3.
Clear TFF3 to 0, and set to invert by the match detect signal
from timer 3.
Select P83 as TO3 pin.
Start timer 3 counting.
1
2
High frequency (fc)
1 (fc)
FPH
3
0
1
2
TMP93CS20
2004-02-10
3
0