TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 180

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

SCL (Bus)
SDA pin
SDA (Bus)
<AL>
<MST>
<TRX>
(8) Cancel interrupt service request
(9) Serial bus interface operation mode selection
(10) Noise detection monitor
by the SBICR1<BC2:0> and the SBICR1<ACK> is complete, a serial bus interface
interrupt request (INTS2) is generated.
same as the value set to the I2CAR and an acknowledge signal is output, when a
“GENERAL CALL” is received and an acknowledge signal is output, or when
transferring/receiving data is complete after the received slave address is the same as
the value set to the I2CAR and a “GENERAL CALL” is received.
to 0. During the time that the PIN is 0, the SCL pin is set to low level.
when it is written 0.
<SBIM1:0> to 10 when used in the I
port is high level.
drain and the pull-up resistor.
rise of the SCL line on the bus, and whether data are output correctly on the bus is
detected only in the master transmitter mode.
cleared to 0 by the hardware. The TMP93CS20 changes to the slave receiver mode, and
continues outputting clocks unit transferring data when the AL was set to 1 is
completed.
clears to the AL to 0.
When the TMP93CS20 is the master mode and transferring a number of clocks set
In the slave mode, the INTS2 is generated when the received slave address is the
When the serial bus interface interrupt request occurs, the SBISR<PIN> is cleared
Either writing or reading data to or from the SBIDBR sets the <PIN> to 1.
The time from the <PIN> being set to 1 until the SCL pin is released takes t
Although the <PIN> can be set to 1 by the program, the <PIN> is not cleared to 0
SBICR2<SBIM1:0> is used to specify the serial bus interface operation mode. Set
Switch a mode to port after making sure that a bus is free.
The I
With the TMP93CS20, the SDA pin output and the SDA line level are compared at a
When the SDA pin output differs from the SDA line level, the SBISR<AL> is set to 1.
When the AL is set to 1, the SDA pin is released and the MST and the TRX are
Either writing or reading data to or from the SBIDBR, or writing data to the SBICR2
2
C bus is easy to be affected by noise, because the bus is driven by the open
Figure 3.10.11 Noise Detection Monitor
93CS20-178
Noise
2
C bus mode after confirming that input signal via
Noise detection
TMP93CS20
2004-02-10
LOW
.