NT2GC64B8HC0NS Nanya Techology, NT2GC64B8HC0NS Datasheet - Page 6

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NT2GC64B8HC0NS

Manufacturer Part Number
NT2GC64B8HC0NS
Description
Un-buffered Ddr3 So-dimm
Manufacturer
Nanya Techology
Datasheet
PC3-8500 / PC3-10600
Un-buffered DDR3 SO-DIMM
NT2GC64B8HC0NS
Serial Presence Detect (Part 1 of 2) [2GB – 2 Ranks, 128Mx8 DDR3 SDRAMs]
REV 1.0
12/2009
117-118 Module manufacture ID
119-125 Module information
126-127 CRC
64-116 Reserved
34-59
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
60
61
62
63
0
1
2
3
4
5
6
7
8
9
CRC range, EEPROM bytes, bytes used
SPD revision
DRAM device type
Module type (form factor)
SDRAM Device density and banks
SDRAM device row and column count
Module minimum nominal voltage
Module ranks and device DQ count
ECC tag and module memory Bus width
Fine timebase dividend/divisor (in ps)
Medium timebase dividend
Medium timebase divisor
Minimum SDRAM cycle time (tCKmin)
Reserved
CAS latencies supported
CAS latencies supported
Minimum CAS latency time (tAAmin)
Minimum write recovery time (tWRmin)
Minimum -to- delay (tRCDmin)
Minimum Row Active to Row Active delay (tRRDmin)
Minimum row Precharge delay (tRPmin)
Upper nibble for tRAS and tRC
Minimum Active-to-Precharge delay (tRASmin)
Minimum Active-to-Active/Refresh delay (tRCmin)
Minimum refresh recovery delay (tRFCmin) LSB
Minimum refresh recovery delay (tRFCmin) MSB
Minimum internal Write-to-Read command delay (tWTRmin)
Minimum internal Read-to-Precharge command delay (tRTPmin)
Minimum four active window delay (tFAWmin) LSB
Minimum four active window delay (tFAWmin) MSB
SDRAM device output drivers suported
SDRAM device thermal and refresh options
Module thermal sensor
SDRAM device type
Reserved
Module height (nominal)
Module thickness (Max)
Raw Card ID reference
DRAM address mapping edge connector
Description
Extended Temperature Range,
Non Thermal Sensor Support
Back: 1 < thickness ≤ 2 mm,
Front: 1 < thickness ≤ 2 mm,
Standard Monolithic Device
CRC Covers Bytes: 0~116,
DLL-Off Mode Support,
29 < height ≦ 30 mm
Total SPD Bytes: 256,
SPD Bytes Used: 176,
(Combo bytes 24,25)
14 rows, 10 columns
(Combo byte 28, 29)
Nanya Technology
Calculated Value
Non ECC, 64bits
6
DDR3 SDRAM
2 ranks, 8 bits
8 banks, 1Gb
Revision 1.0
Raw Card F
SO-DIMM
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
13.125ns
13.125ns
13.125ns
50.625ns
RZQ / 7,
1.875ns
37.5ns
37.5ns
110ns
1.5 V
2.5ps
7.5ns
7.5ns
7.5ns
ASR,
6,7,8
15ns
-BE
1ns
8ns
1,1
SPD Entry Value
NANYA reserves the right to change products and specifications without notice.
Extended Temperature Range,
Non Thermal Sensor Support
Front: 1 < thickness ≤ 2 mm,
Back: 1 < thickness ≤ 2 mm,
CRC Covers Bytes: 0~116,
Standard Monolithic Device
DLL-Off Mode Support,
SPD Bytes Used: 176,
29 < height ≦ 30 mm
Total SPD Bytes: 256,
14 rows, 10 columns
(Combo bytes 24,25)
(Combo byte 28, 29)
Nanya Technology
Non ECC, 64bits
Calculated Value
DDR3 SDRAM
2 ranks, 8 bits
8 banks, 1Gb
Revision 1.0
Raw Card F
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
SO-DIMM
13.125ns
13.125ns
13.125ns
49.125ns
RZQ / 7,
6,7,8,9
110ns
2.5ps
1.5ns
7.5ns
7.5ns
1.5 V
ASR,
15ns
36ns
30ns
-CG
1ns
8ns
6ns
1,1
© NANYA TECHNOLOGY CORPORATION
Serial PD Data Entry (Hex.)
830B
503F
-BE
1C
3C
2C
3C
3C
2C
92
10
0B
03
02
11
00
09
03
52
01
08
0F
00
00
69
78
69
69
11
95
70
03
01
82
05
00
00
0F
11
05
00
--
--
--
830B
1296
-CG
92
10
0B
03
02
11
00
09
03
52
01
08
0C
00
3C
00
69
78
69
30
69
11
20
89
70
03
3C
3C
00
F0
82
05
00
00
0F
11
05
00
--
--
--

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