AMD-762 Advanced Micro Devices, AMD-762 Datasheet - Page 32

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AMD-762

Manufacturer Part Number
AMD-762
Description
System Controller
Manufacturer
Advanced Micro Devices
Datasheet
AMD-762™ System Controller Data Sheet
20
While AGP relieves traffic on the PCI bus and frees up graphics
adapter memory, the greatest impact on system performance
comes from the many innovations AGP brings to data transfer
operations. These improvements include the following:
n Split Transactions—Requests to read or write data are
n Pipelined Requests—Requests can be issued contiguously
n Pipeline Grants—Pipelined GNT# signals for up to four
n Prioritizing (reordering)—Read and write requests can be
n Defined-Length Requests—The amount of data requested is
n An 8-byte minimum data size for AGP 2x/4x transfers, which
n A separate, optional Sideband Address (SBA) bus that
n Optional 2x/4x modes that increase the AGP graphics
n Freedom from the coherency requirements of PCI, which
n Full PCI 2.2 capability, which enables the AMD-762 system
n A Graphics Address Remapping Table (GART).
The AGP request queue is split up into two queues —one for
read requests and one for write requests. Because there is a
reordering FIFO in the address module, the request queues do
not have to be large. The read queue is big enough to hold all
outstanding read requests, which avoids stalling writes that
run on the bus while the reads occur to memory.
separate from the data transfers.
and stored in the AMD-762 system controller request queue.
Pipelining allows AGP to achieve high levels of concurrency
with PCI and the processor.
write transactions.
assigned a high priority or a low priority to ensure that
more urgent requests are serviced first.
indicated in the AGP command, rather than the duration of
an asserted signal, such as FRAME# in PCI.
provides a more efficient method for moving the large
amount of data typical in a graphics request.
enables concurrent transmissions of requests and data
transfers.
adapter data transfer rate.
eliminates the latency resulting from cache snooping.
controller to pass programming information from the
processor to the graphics adapter.
Preliminary Information
Functional Operation
24416C—December 2001
Chapter 2

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