RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 115

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

RS8953B/8953SPB
HDSL Channel Unit
Must be set to 0x04 before any other MPU access to device, for normal operation. Other values are reserved for
Conexant production test.
STUFF_SEL[1:0]
EXT_STUFF
ZBIT_SEL[1:0]
MASTER_SEL[1:0]
DPLL_NCO
N8953BDSB
0xE8—Command Register 4 (CMD_4)
0xE9—Command Register 5 (CMD_5)
DPLL_NCO
7
Master STUFF source is applicable only if SLV_STUF [TCMD_2; addr 0x07] is enabled. The
slave’s bit stuffing is provided by the master STUFF source.
NOTE:
External STUFF—Controls whether 0 or 4 STUFF bits are inserted for slave channels that
select external stuffing. TSTUFF [addr 0xE4] supplies 4 STUFF bit values. The MPU must
write EXT_STUFF at each slave’s transmit frame interrupt.
Z-bit Monitor Selection—Applicable only in E1 mode. ZBIT_SEL selects which channel
supplies the last 40 Z-bits to fill the RZBIT_2–RZBIT_6 registers [addr 0x18–0x1C].
Master Channel Selection—Selects which HDSL receive channel provides the 6 ms frame
sync signal to the DPLL and PCM formatter. The selected channel’s 6 ms frame is used to
align the PCM receive timebase and to recover the PCM receive clock.
Operates the DPLL as an NCO —The DPLL operates in open loop configuration. Normally,
the DPLL operates in closed loop to recover the PCM receive clock from the master HDSL
receive channel. However, the DPLL may be operated in open loop as a Numerically
Controlled Oscillator (NCO) when the master HDSL reference is unavailable (i.e., during
startup procedure or loss of signal conditions). This bit is only monitored when DPLL is not in
lock.
6
MASTER_SEL[1:0]
If SLV_STUF is enabled and is also selected as master, then the master STUFF source
automatically inserts 0 and 4 STUFF bits in alternating frames.
STUFF_SEL[1:0]
ZBIT_SEL[1:0]
5
00, 01
0 = Insert 0 STUFF bits
1 = Insert 4 STUFF bits
0 = Closed loop DPLL operation
1 = Open loop DPLL operation
00
01
10
11
10
11
MASTER_SEL[1:0]
00, 01
10
11
4
Conexant
ZBIT_SEL[1:0]
Monitor RZBIT[47:8] from
HDSL Transmit Channel 1
HDSL Transmit Channel 2
HDSL Transmit Channel 3
EXT_ STUFF (see below)
HDSL receive channel 1
HDSL receive channel 2
HDSL receive channel 3
3
STUFF Source
Master HDSL Receive Channel
EXT_STUFF
Channel 1
Channel 2
Channel 3
2
4.11 Common Command
1
STUFF_SEL[1:0]
4.0 Registers
0
4-47