RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 56

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

3.0 Circuit Descriptions
3.5 HDSL Channel
3.5.1 HDSL Transmit
Figure 3-19. HDSL Transmitter Block Diagram
3-24
3.5.1.2 HOH Multiplexer
TFIFO_RST
Data From
CHn TSYNC
(from PCM)
TFIFO
TAUXn
TLOADn
3.5.1.1 Transmit
Payload Mapper
BCLKn
DBANK1
DBANK2
DBANK3
Payload
Length
Frame
Map
Three identical HDSL transmitters accept data and sync from the PCM channel,
insert HDSL overhead, and output serially encoded 2B1Q data on TDATn. One
HDSL transmitter, shown in
HOH multiplexer, STUFF generator and 2B1Q encoder. All transmitter circuits
are clocked by BCLKn, where n corresponds to HDSL channels numbered 1, 2,
or 3. The HDSL transmit timebase develops 6 ms frame timing based upon the
programmed HFRAME_LEN [addr 0xCA] and initial phase alignment
established from PCM transmit 6 ms sync plus the TFIFO_WL delay. Each
HDSL transmitter automatically manages SYNC, STUFF, and CRC overhead
protocols and provides the MPU with write register access for insertion of IND,
EOC, and Z-bit overhead bits, but does not automatically manage IND, EOC, or
Z-bit protocols.
The transmit payload mapper controls the contents of HDSL transmit payload
blocks by selecting data for each payload byte from one of five data sources
according to selections made in the TMAP Registers [TMAP_1; addr 0x08].
TMAP selects one of five sources for each byte within the payload block: PCM
timeslot or F-bit data from the TFIFO, one of three fixed pattern Data Bank
Registers (DBANK1–DBANK3), or data sampled from the HDSL auxiliary input
(TAUXn).
Placement of HDSL Overhead (HOH) bits in the output frame is performed by
the HOH multiplexer. HOH bits are grouped into the following categories:
SYNC, IND, EOC, CRC, STUFF, and Z-bits. (Refer to
positions within the output frame.) The MPU controls the contents of the HOH
bits by writing SYNC_WORD [addr 0xCB], TIND, TEOC, TZBIT (see
Table
autonomously and inserted into the appropriate HOH bit positions.
4-2) and TSTUFF [addr 0xE4] register values. CRC bits are calculated
EOC
48
Z-bit
IND
TX 6 ms
CRC
Conexant
Generator
GCLK
Stop
Start
CNT
Stuff
Multiplexer
Scrambler
HOH
Figure
CMP
Threshold
3-19, consists of a transmit payload mapper,
Sync
RDATn
HH_LOOP
Table 3-2
RS8953B/8953SPB
= Command Register Bit
HDSL Channel Unit
2B1Q
Align
for HOH bit
N8953BDSB
TDATn
QCLKn