RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 40

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

3.0 Circuit Descriptions
3.2 PCM Channel
Figure 3-7. Drop/Insert Channel Timing
3-8
NOTE(S):
1. Falling-edge samples and rising-edge outputs shown per TCLK_SEL = 00 and RCLK_SEL = 00.
2. First entry of Transmit ROUTE_TBL [addr 0xED] shown programmed with INSERT_EN = 1.
3. First entry of Receive COMBINE_TBL [addr 0xEE] shown programmed with DROP_EN = 1.
4. For illustrative purposes only, Transmit and Receive are shown phase, frequency, and frame aligned.
3.2.1.4 Drop/Insert
RMSYNC
Receive
RSER
DROP
RSER
DROP
RCLK
Channel
TMSYNC
Transmit
INSERT
INSERT
INSDAT
INSDAT
TSER
TSER
TCLK
PCM channels can carry timeslot data along a backplane that serves multiple
interfaces or subscriber line cards (see
interface or line card be able to drop or insert individual PCM timeslots. The
RS8953B provides DROP and INSERT signals to facilitate external multiplexing
of individual timeslots from a shared PCM backplane, but does not provide the
capability to three-state its data outputs during specific PCM timeslots. DROP
and INSERT signals are programmed to mark RSER data output and INSDAT
data input timeslots via the receive Combination Table [COMBINE_TBL; addr
0xEE] and the transmit Routing Table [ROUTE_TBL; addr 0xED] assignments.
NOTE:
Only INSDAT provides an alternate source for each PCM transmit timeslot
and does not expand the total number of available timeslots.
shows DROP and INSERT timing as it relates to PCM bus timing during
T1/E1 applications.
F
0
1
1
Conexant
2
2
Timeslot 0
3
3
Timeslot 0
4
4
5
5
Figure
6
6
7
7
1-3) which requires that each
8
8
9
9
RS8953B/8953SPB
}
}
(E1_MODE = 0)
HDSL Channel Unit
(E1_MODE = 1)
Figure 3-7
N8953BDSB