RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 126

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

4.0 Registers
4.13 Receive/Transmit Status
TX_STUFF
TFIFO_FULL
TFIFO_MPTY
TFIFO_SLIP
STUFF_ERR
4-58
0x07—Transmit Status (STATUS_3)
0x21—CRC Error Count (CRC_CNT)
—
7
7
Transmit STUFF Decision—Indicates whether the last transmitted HDSL frame was output
with 4 STUFF bits or none.
Transmit FIFO Full Error—Indicates the TFIFO has overflowed. This is also reported in
ERR_STATUS and IRR (if TX_ERR_EN in TCMC_1[addr0x06]) and generates a TX_ERR
interrupt (if TX_ERR in IMR is enabled). TFIFO_FULL errors may result from a change of
transmit PCM frame alignment when MPU writes to TFIFO_RST, or from any changes in
TCLK or BCLKn frequency or to the transmit routing table or the transmit payload map.
Transmit FIFO Empty Error—Indicates the TFIFO has Underrun. This is also reported in
ERR_STATUS and IRR (if TX_ERR_EN in TCMC_1[addr0x06]), and generates a TX_ERR
interrupt (if TX_ERR in IMR is enabled). TFIFO_MPTY errors may be triggered by events
similar to those which cause TFIFO_FULL errors.
Transmit FIFO Slip—Indicates that the number of PCM timeslots routed into the TFIFO is not
equal to the number of payload bytes mapped out of the TFIFO over a 6 ms period. This is also
reported in ERR_STATUS and IRR (if TX_ERR_EN in TCMC_1[addr0x06]), and generates a
TX_ERR interrupt (if TX_ERR in IMR is enabled). TFIFO_SLIP errors may be triggered by
events similar to those which cause TFIFO_FULL errors. Repeated TFIFO_SLIP errors may
indicate improper configuration of either the transmit payload map or the transmit routing
table.
Transmit Stuffing Error—Indicates when the phase difference measured from PCM to HDSL
6 ms frames exceeds the maximum bit Stuffing Threshold [STF_THRESH_C; addr 0xD3].
This is also reported in ERR_STATUS and IRR (if TX_ERR_EN) and generates a TX_ERR
interrupt (if TX_ERR in IMR is enabled). STUFF_ERR may be triggered by events similar to
those which cause TFIFO_FULL errors. The STUFF generator is automatically reset when
STUFF_ERR is detected.
—
6
6
—
5
5
0 = No STUFF bits output
1 = 4 STUFF bits output
0 = TFIFO normal
1 = TFIFO overflowed
0 = TFIFO normal
1 = TFIFO Underrun
0 = Transmit FIFO normal
1 = Transmit FIFO unbalanced
0 = STUFF generator normal
1 = STUFF generator error
STUFF_ERR
4
4
Conexant
CRC_CNT[7:0]
TFIFO_SLIP
3
3
TFIFO_MPTY
2
2
TFIFO_FULL
RS8953B/8953SPB
1
1
HDSL Channel Unit
N8953BDSB
TX_STUFF
0
0