RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 135
RS8953
Manufacturer Part Number
RS8953
Description
High-bit-rate Digital Subscriber Line (hdsl) Channel unit
Manufacturer
Conexant Systems, Inc.
Datasheet
1.RS8953.pdf
(173 pages)
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RS8953B/8953SPB
HDSL Channel Unit
AIS
RST_E_CNT
This register is updated once every PCM multiframe. The bits in this register correspond to the bits in the
transmitted PCM multiframe stream, in the PCM to HDSL direction.
Sa6 _1, _2, _3, _4
Sa5
A
E1
E2
The register is update twice in an PCM multiframe. It increments each time one of the E-bits is detected
active 0.
N8953BDSB
0x42—PRA Transmit Monitor Register 1 (TX _PRA_MON1)
0x43—PRA Transmit E-Bits Counter (TX _PRA_E_CNT)
0x45—PRA Transmit In-Band Code (TX_PRA_CODE)
The counter wraps around at 255. It is cleared or enabled by RESET_E_CNT of TX_PRA_CTRL1 register.
Sa
Sa
7
7
7
6
6
_4
_4
Enables to override all 32 slots of an PCM frame except Slot 0, transmitted towards the HDSL
link, with a constant pattern:
NOTE:
Clears the TX_E counter, as follows:
NOTE:
Sa6 _1, _2, _3, _4 is updated only if the same Sa6 pattern is detected in the second
submultiframe and synchr_en = 0.
Sa5 is only updated if all 8 corresponding bits of the multiframe were detected as identical.
A-bit is only updated if all 8 corresponding bits of the multiframe were detected as identical.
E1is the E-bit detected in Frame 13.
E2 is the E-bit detected in Frame 15.
Sa
Sa
6
6
6
6
6
_3
_3
AIS enables to achieve framed AIS. To achieve unframed arbitrary AUX pattern
generation, use the existing feature of the channel unit.
The value of this register takes effect starting with the next PCM multiframe
following the write access cycle completion.
Sa
Sa
5
5
5
6
6
_2
_2
0 = Disable (Normal)
1 = 0xFF
AIS must be activated with reset_e_cnt = 1
0 = Counter enabled
1 = Clear the E-transmit counter
Sa
Sa
TX_PRA_E_CNT[7:0]
4
4
4
6
6
_1
_1
Conexant
Sa
—
3
3
3
5
—
A
2
2
2
S
E2
1
1
1
4.15 PRA Transmit Read
a
5
4.0 Registers
E1
0
0
0
A
4-67
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