IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 108

• Manufacturer Part Number: IDT82P2284
• Description: 4 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2284
4.4
registers in the device. The interface consists of Serial Peripheral Inter-
face (SPI) and parallel microprocessor interface.
Operation
SCLK
SCLK
SDO
SDO
SDI
SDI
CS
CS
The microprocessor interface provides access to read and write the
MICROPROCESSOR INTERFACE
0
0
X
X
1
1
X
X
2
2
Instruction
Instruction
X A11 A10 A9
X A11 A10
3
3
4
4
High Impedance
High Impedance
5
5
A9
Figure 39. Write Operation In SPI Mode
Figure 38. Read Operation In SPI Mode
6
6
A8
A8
7
7
A7 A6 A5 A4 A3 A2 A1
A7 A6 A5 A4 A3 A2 A1
8
8
9
9
10
Register Address
10
Register Address
97
11 12 13 14 15 16 17 18 19 20 21 22 23
11 12 13 14 15 16 17 18 19 20 21 22 23
4.4.1
set in SPI mode.
with the microprocessor. A falling transition on CS pin indicates the start
of a read/write operation, and a rising transition indicates the end of the
operation. After the CS pin is set to low, one instruction byte on the SDI
pin is input to the device on the rising edge of the SCLK pin. If the MSB
is ‘1’, it is read operation. If the LSB is ‘0’, it is write operation. Following
the instruction byte, one address byte is clocked in on the SDI pin to
specify the register. If the device is in read operation, the data read from
the specified register is output on the SDO pin on the falling edge of the
SCLK (refer to Figure 38). If the device is in write operation, the data
written to the specified register is input on the SDI pin following the
address byte (refer to Figure 39).
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Pull the SPIEN pin to high, and the microprocessor interface will be
In this mode, only the CS, SCLK, SDI and SDO pins are interfaced
SPI MODE
A0
A0
D7 D6 D5 D4 D3 D2 D1
D7 D6 D5 D4 D3 D2 D1
Data Byte
Don't Care
D0
March 22, 2004
D0