IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 76

• Manufacturer Part Number: IDT82P2284
• Description: 4 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2284
3.18.1.4
modes. The offset is between the framing pulse on the TSFSn/MTSFS
pin and the start of the corresponding frame input on the TSDn/
MTSDA(MTSDB)
Bit offset and channel offset are both supported in all the operating
Offset
pin.
Transmit Clock Slave mode / Transmit Multiplexed mode:
Transmit Clock Master mode:
Transmit Clock Slave mode / Transmit Multiplexed mode:
Transmit Clock Master mode:
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
The
signaling
Figure 27. No Offset When FE = 1 & DE = 1 In Transmit Path
Figure 28. No Offset When FE = 0 & DE = 0 In Transmit Path
bits
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
on
the
TSIGn/
FE = 1, DE = 1
FE = 0, DE = 0
65
MTSIGA(MTSIGB) pin are always per-channel aligned with the data on
the TSDn/MTSDA(MTSDB) pin.
Bit 2
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Bit 2
Figure 27 to Figure 30 show the base line without offset.
Bit 2
Bit 2
March 22, 2004