IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 131
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IDT82P2284
Manufacturer Part Number
IDT82P2284
Description
4 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT82P2284.pdf
(384 pages)
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IDT82P2284
T1/J1 Backplane Global Configuration (010H)
RSLVCK:
RMUX:
MTSDA:
TSLVCK:
TMUX:
Programming Information
Bit Name
Default
Bit No.
This bit is valid when all four links are in the Receive Clock Slave mode.
= 0: Each link uses its own clock signal on the RSCKn pin and framing pulse on the RSFSn pin.
= 1: All four links use the clock signal on the RSCK[1] pin and the framing pulse on the RSFS[1] pin.
= 0: The Receive System Interface of the device is operated in the Non-multiplexed mode.
= 1: The Receive System Interface of the device is operated in the Multiplexed mode.
This bit is valid in Transmit Multiplexed mode. It selects one multiplexed bus for the Transmit System Interface of the device.
= 0: The multiplexed bus B is selected. The data and signaling bits are de-multiplexed from multiplexed bus B.
= 1: The multiplexed bus A is selected. The data and signaling bits are de-multiplexed from multiplexed bus A.
This bit is valid when all four links are in the Transmit Clock Slave mode.
= 0: Each link uses its own timing signal on the TSCKn pin and framing pulse on the TSFSn pin.
= 1: All four links use the timing signal on the TSCK[1] pin and the framing pulse on the TSFS[1] pin.
= 0: The Transmit System Interface of the device is operated in the Non-multiplexed mode.
= 1: The Transmit System Interface of the device is operated in the Multiplexed mode.
Type
7
Reserved
6
5
RSLVCK
120
R/W
4
1
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
RMUX
R/W
3
0
MTSDA
R/W
2
1
TSLVCK
R/W
1
1
March 22, 2004
TMUX
R/W
0
0
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