IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 77

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IDT82P2284

Manufacturer Part Number
IDT82P2284
Description
4 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2284
BOFF[2:0] bits and the TSOFF[6:0] bits are not ‘0’ respectively.
the corresponding frame input on the TSDn/MTSDA(MTSDB) pin will
delay ‘N’ clock cycles to the framing pulse on the TSFSn/MTSFS pin.
(Here ‘N’ is defined by the BOFF[2:0] bits.) When the CMS bit is ‘0’ and
the TSOFF[6:0] bits are set, the start of the corresponding frame input
on the TSDn/MTSDA(MTSDB) pin will delay ‘8 x M’ clock cycles to the
framing pulse on the TSFSn/MTSFS pin. (Here ‘M’ is defined by the
TSOFF[6:0].)
BOFF[2:0] bits are set, the start of the corresponding frame input on the
TSDn/MTSDA(MTSDB) pin will delay ‘2 x N’ clock cycles to the framing
pulse on the TSFSn/MTSFS pin. (Here ‘N’ is defined by the BOFF[2:0]
The bit offset and channel offset are configured when the
When the CMS bit is ‘0’ and the BOFF[2:0] bits are set, the start of
When the CMS bit is ‘1’ (i.e., in double clock mode) and the
Transmit Clock Slave mode / Transmit Multiplexed mode:
Transmit Clock Master mode:
Transmit Clock Master mode:
Transmit Clock Slave mode / Transmit Multiplexed mode:
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
TSFSn / MTSFS
TSCKn / MTSCK
TSDn / MTSDA(B)
Figure 29. No Offset When FE = 0 & DE = 1 In Transmit Path
Figure 30. No Offset When FE = 1 & DE = 0 In Transmit Path
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
Bit 1 of CH1 / TS0
FE = 0, DE = 1
FE = 1, DE = 0
66
bits.) When the CMS bit is ‘1’ (i.e., in double clock mode) and the
TSOFF[6:0] bits are set, the start of the corresponding frame input on
the TSDn/MTSDA(MTSDB) pin will delay ‘16 x M’ clock cycles to the
framing pulse on the TSFSn/MTSFS pin. (Here ‘M’ is defined by the
TSOFF[6:0].)
from 0 to 23 channels (0 & 23 are included). In Multiplexed mode, the
channel offset can be configured from 0 to 127 channels (0 & 127 are
included).
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
In Non-multiplexed mode, the channel offset can be configured
Bit 2
Bit 2
Bit 2
Bit 2
March 22, 2004

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