IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 272

• Manufacturer Part Number: IDT82P2284
• Description: 4 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2284
E1 TBIF TS Offset (044H, 144H, 244H, 344H)
TSOFF[6:0]:
start of the corresponding frame input on the TSDn/MTSDA(MTSDB) pin. The signaling bits on the TSIGn/MTSIGA(MTSIGB) pin are always per-
timeslot aligned with the data on the TSDn/MTSDA(MTSDB) pin.
set can be configured from 0 to 127 timeslots (0 & 127 are included).
E1 TBIF Bit Offset (045H, 145H, 245H, 345H)
EDGE:
pins.
BOFF[2:0]:
corresponding frame input on the TSDn/MTSDA(MTSDB) pin. The signaling bits on the TSIGn/MTSIGA(MTSIGB) pin are always per-timeslot aligned
with the data on the TSDn/MTSDA(MTSDB) pin.
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
These bits give a binary number to define the timeslot offset. The timeslot offset is between the framing pulse on the TSFSn/MTSFS pin and the
In Non-multiplexed mode, the timeslot offset can be configured from 0 to 31 timeslots (0 & 31 are included). In Multiplexed mode, the timeslot off-
This bit is valid when the CMS bit (b2, E1-042H,...) is ‘1’.
= 0: The first active edge of TSCKn/MTSCK is selected to sample the data on the TSDn/MTSDA(MTSDB) and TSIGn/MTSIGA(MTSIGB) pins.
= 1: The second active edge of TSCKn/MTSCK is selected to sample the data on the TSDn/MTSDA(MTSDB) and TSIGn/MTSIGA(MTSIGB)
These bits give a binary number to define the bit offset. The bit offset is between the framing pulse on the TSFSn/MTSFS pin and the start of the
Reserved
7
7
TSOFF6
R/W
6
0
6
Reserved
TSOFF5
R/W
5
0
5
TSOFF4
R/W
4
0
4
261
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
TSOFF3
EDGE
R/W
R/W
3
0
3
0
TSOFF2
BOFF2
R/W
R/W
2
0
2
0
TSOFF1
BOFF1
R/W
R/W
1
0
1
0
March 22, 2004
TSOFF0
BOFF0
R/W
R/W
0
0
0
0