IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 222

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IDT82P2284

Manufacturer Part Number
IDT82P2284
Description
4 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2284
T1/J1 RPLC Configuration (0D0H, 1D0H, 2D0H, 3D0H)
SIGSNAP:
signaling bits of the current whole SF, ESF or SLC-96 frame.
GSTRKEN:
GSUBST[2:0]:
Programming Information
GSUBST[2:0]
Bit Name
the others
Default
Bit No.
Type
This bit is valid when SF, ESF or SLC-96 frame is in synchronization.
= 0: Disable the signaling snapshot.
= 1: Enable the signaling snapshot. That is, the signaling bits of the first frame are locked and output on the RSIGn/MRSIGA(MRSIGB) pin as the
= 0: The replacement is performed on a per-channel basis by setting the STRKEN bit (b4, T1/J1-ID-41~58H) in the corresponding channel.
= 1: The signaling bits (ABCD) of all channels are replaced by the signaling trunk conditioning code in the A,B,C,D bits (b3~0, T1/J1-ID-41~58H).
These bits select the replacement of all the channels.
000
001
010
011
The replacement is performed on a per-channel basis by setting the SUBST[2:0] bits (b7~5, T1/J1-ID-01~18H) in the corresponding channel.
The data of all channels is replaced by the data trunk code set in the DTRK[7:0] bits (b7~0, T1/J1-ID-21~38H).
The data of all channels is replaced by the A-Law digital milliwatt pattern.
The data of all channels is replaced by the µ-Law digital milliwatt pattern.
Reserved.
SIGSNAP
R/W
7
1
GSTRKEN
R/W
6
0
5
Reserved
4
Replacement Selection
211
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
3
GSUBST2
R/W
2
0
GSUBST1
R/W
1
0
March 22, 2004
GSUBST0
R/W
0
0

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