MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 60

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

Byte #
18-49
52-53
Cell
1-4
10
11
12
13
14
15
16
17
50
51
5
6
7
8
9
Address (Hex):
Direct access
Reset Value (Hex):
Address
Offset
00-03
11-30
33-34
0C
0D
0A
0B
0E
0F
04
05
06
07
08
09
10
31
32
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Header of ICP Cell. The values should be set to
Byte 0: 0x00, byte 1: 0x00, byte 2: 0x00, byte 3: 0x0B.
HEC is always calculated and inserted by the MT90221.
OAM, should be set to 0x01
Cell ID, Link ID. The bit 7 (Cell ID) is controlled by the MT90221, the Link ID is
provided by the TX Link ID Register.
IMA Frame Sequence Number. Inserted by the MT90221.
ICP Cell Offset. Inserted by the MT90221 based on the Link Offset register
info.
Link Stuff Indication. Inserted by the MT90221.
Status & Control Change Indication. Inserted by the MT90221.
IMA ID
Group Status and Control
Synchronization Information
Tx Test Control
Tx Test Pattern
Rx Test Pattern
Status and Control of links with LID in the range 0-31
Unused
End-to-End channel
CRC Error Control. Inserted by the MT90221
300, 340, 380, 3C0 for IMA Group 0, 1, 2 and 3 respectively
Access these locations directly then use transfer
command to copy to internal memory
These registers need to be initialized for proper
operation
Table 40 - TX ICP Cell Registers
Description
MT90221
51