MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 71

• Manufacturer Part Number: MT90221
• Description: Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
• Manufacturer: Zarlink Semiconductor

MT90221
62
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
7:6
4:3
1:0
7:6
5:0
5
2
Bit #
7:0
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Type
R/W
00: normal delay,
01: read pointer,
10: write pointer.
Writing a 1 will reset the value of the maximum delay over time register for the selected
IMA Group (see bits 1:0).
Delay register:
11: Maximum Delay over time
10: Current Maximum Delay for an IMA Group
01: Current Minimum Delay for an IMA Group
00: Current Delay for a link
Reserved. Write 0 for normal operation.
Bits 1:0 are used to specify the physical link or the IMA Group number.
Unused. Read all 0’s.
Delay Value (MSB)
29D
Used to initiate an update of the RX Delay registers based on the link and delay
value to read
00
285
This register contains the delay value (in number of cells) selected by the RX
04
284
This register contains the delay value (in number of cells) selected by the RX
00
Delay Select Register. The value always include the current guardband delay.
Delay Select Register. The value always include the current guardband delay
Delay Value (LSB).
Table 67 - RX Delay Select Register
Table 68 - RX Delay MSB Register
Table 69 - RX Delay LSB Register
Description
Description
Description