MT90221 Zarlink Semiconductor, MT90221 Datasheet - Page 79
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MT90221
Manufacturer Part Number
MT90221
Description
Quad Inverse Multiplexing For Atm (IMA) Device With Flexible Ima And Uni Mode
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90221.pdf
(115 pages)
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MT90221
7.10 Counter Registers Description
Tables 89 to 93 describe the Counter registers
70
Address (Hex):
Synchronized access The value in this register is used for internal access to the counter when the
Reset Value (Hex):
Address (Hex):
Synchronized access The value in this register is used for internal access to the counter when the
Reset Value (Hex):
Address (Hex):
Synchronized access The value in this register is used for internal access to the counter when the
Reset Value (Hex):
Bit #
Bit #
Bit #
7:0
7:0
7:0
Type
Type
Type
R/W
R/W
R/W
A read accesses the byte #2 of the Counter that was selected in the Select Counter
register.
A write will hold the value to be written to the selected counter.
A read accesses the byte #1 (Least Significant Byte) of the Counter that was selected in
the Select Counter register.
A write will hold the value to be written to the selected counter.
A read accesses the MSB (byte 3) of the Counter selected in the Select Counter register.
A write will hold the value to be written to the selected counter.
215
00
216
00
214
00
transfer command is issued
transfer command is issued
transfer command is issued
Table 89 - Counter Byte Number 3 Register
Table 90 - Counter Byte Number 2 Register
Table 91 - Counter Byte Number 1 Register
Description
Description
Description
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