SC28L202 Philips Semiconductors, SC28L202 Datasheet - Page 23

• Manufacturer Part Number: SC28L202
• Description: Dual universal asynchronous receiver/transmitter DUART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Traditional methods of polling status registers may also be used.
Their lower efficiency may be greatly offset by use of the UCIR
command and the read of the CIR. They reduce the many reads and
tests of status registers to only one read and one write. This would
normally be accomplished by setting the interrupt threshold to zero.
Then the moment any system within the DUART needs service the
next poll of the CIR would return a non zero value and the type field
will inform the processor which of the possible 18 systems needs
service. In the case of the FIFOs the number of bytes to be written
or read is also available.
Character and Address Recognition
(Also used for Multi–drop, Xon/Xoff systems)
Character recognition is specific to each of the two UARTs. Three
programmable characters are provided for the character recognition
for each channel. The three are general purpose in nature and may
be set to only cause an interrupt or to initiate some rather complex
operations specific to ”Multi–drop” address recognition or in–band
Xon/Xoff flow control.
Character recognition system continually examines the incoming
data stream. Upon the recognition of a character bits appropriate for
the character recognized are set in the Xon/Xoff Interrupt Status
Register (XISR) and in the Interrupt Status Register (ISR). The
setting of these bit(s) will initiate any of the automatic sequences or
and/or an interrupt that may have enabled via the MR0 register.
NOTE: Reading the XISR Clears the status bits associated with the
recognition.
The characters of the recognition system are fully programmable.
The Xon/Xoff characters will be set to the standard characters if the
hardware or software reset is used.
The character recognition circuits are basically designed to provide
general–purpose character recognition. Additional control logic has
been added to allow for Xon/Xoff flow control and for recognition of
the address character in the multi–drop or ”wake–up” mode. This
logic also allows for the generation of interrupts in either the
general–purpose recognition mode or the specific conditions
mentioned above.
The generality of the above provides a modicum of compatibility to
BOP (Bit Oriented Protocol) where the generation and detection of
“flags” is required. Parts of usually synchronous BOP protocols
(HDLC in particular) are beginning to show up in asynchronous
formats.
Character Stripping
The MR0 register provides for stripping the characters used for
character recognition. Recall that the character recognition may be
conditioned to control several aspects of the communication.
However this system is first a character recognition system. The
status of the various states of this system is reported in the XISR
and ISR registers. The character stripping of this system allows for
the removal of the specified control characters from the data stream:
two for the Xon /Xoff and one for the wake up. Via control in the
MR0 register these characters may be discarded (stripped) from the
data stream when the recognition system “sees” them or they may
be sent on the RxFIFO. Whether they are stripped or not the
recognition system will process them according to the action
requested; flow control, wake up, interrupt generation, etc. Care
should be exercised in programming the stripping option if noisy
environments are encountered. If a normal character were corrupted
to a Xoff character the transmitter would be stopped. If that
character were now stripped from the FIFO stack, then that stripping
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Dual UART
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action would make it difficult to determine the cause of transmitter
stopping.
When character stripping is invoked and a recognition character is
received that has an error bit set that character is sent to the
RxFIFO even though character stripping is active.
Flow Control (Xon/Xoff)
This section describes in–band flow control or Xon/Xoff signaling.
For the RTS/CTS hardware (out–of–band) control see MR1(7) and
MR2(4) descriptions.
The flow control is accomplished via the character recognition
system giving recognition information to the flow control processor.
Xon and Xoff are special characters used by a receiver to start and
stop the remote transmitter that is sending it data. As described
below several modes of manual and automatic flow control are
available by program control.
The modes of control are described in MR3(3:2)
Mode control
Xon/Xoff mode control is accomplished via the MR0. Bits 3 and 2
reset to zero resulting in all Xon/Xoff processing being disabled. If
MR0 [2] is set, Xon/Xoff characters received may gate the
transmitter. If MR0 [3] is set, the transmitter will transmit Xon and
Xoff when triggered by attainment of fixed fill levels in the channel
RxFIFO. The MR0 [7] bit also has a Xon/Xoff function control. If this
bit is set, a received Xon or Xoff character is not loaded into the
RxFIFO. If cleared, the power–on and reset default, the received
Xon or Xoff character is loaded onto the RxFIFO for examination by
the host CPU. The MR0 (7) function operates regardless of the
value in MR0 (3:2)
Xon Xoff Characters
The programming of these characters is usually done individually.
The standard Xon/Xoff characters are . Xon is 0x11, Xoff 0x13. Any
enabling of the Xon/Xoff functions will use the contents of the Xon
and Xoff character registers as the basis on which recognition is
predicated.
Host mode
When neither the auto–receiver or auto–transmitter modes are set,
the Xon/Xoff logic is operating in the host mode. In host mode, all
activity of the Xon/Xoff logic is initiated by commands to the CRx.
The Xoff command forces the transmitter to disable exactly as
though a Xoff character had been received by the RxFIFO. The
transmitter will remain disabled until the chip is reset or the CR (7:3)
= 10110 (Xoff resume) command is given. In particular, reception of
a Xon or disabling or re–enabling the transmitter will NOT cause
resumption of transmission. Redundant CRTX–– commands, i.e.
CRTXon, CRTXon, are harmless, although they waste time. A
CRTXon may be used to cancel a CRTXoff (and vice versa) but both
may be transmitted depending on the command timing with respect
to that of the transmitter state machine.
Auto–transmitter mode
When a channel receiver loads a Xoff character into the RxFIFO, the
channel transmitter will finish transmission of the current character
and then stop transmitting. A transmitter so idled can be restarted by
the receipt of a Xon character by the receiver or by a hardware or
00 = Host mode
01 = Auto transmit
10 = Auto Receive
11 = Auto receive and transmit
Objective specification
SC28L202