SC28L202 Philips Semiconductors, SC28L202 Datasheet - Page 59

• Manufacturer Part Number: SC28L202
• Description: Dual universal asynchronous receiver/transmitter DUART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
REGISTER MAP (BASED ON 28L92)
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip. These are
denoted by a ” ” symbol
2000 Feb 10
A(6:0)
100 0000 (0x40)
100 0001 (0x41)
100 0010 (0x42)
100 0011 (0x43)
100 0100 (0x44)
100 0101 (0x45)
100 0110 (0x46)
100 0111 (0x47)
100 1000 (0x48)
100 1001 (0x49)
100 1010 (0x4A)
100 1011 (0x4B)
100 1100 (0x4C)
100 1101 (0x4D)
100 1110 (0x4E)
100 1111 (0x4F)
101 0000 (0x50)
101 0001 (0x51)
101 0010 (0x52)
101 0011 (0x53)
101 0100 (0x54)
101 0101 (0x55)
101 0110 (0x56)
101 0111 (0x57)
101 1000 (0x58)
101 1001 (0x59)
101 1010 (0x5A)
101 1011 (0x5B)
101 1100 (0x5C)
101 1101 (0x5D)
101 1110 (0x5E)
101 1111 (0x5F)
Dual UART
READ
NEW
System Enable Status (SES A)
Xon Character Register (XonCR A)
Xoff Character Register (XoffCR A)
Address Recognition Character (ARCR A)
Xon/Xoff Interrupt Status Register (XISR A)
Special Function Register (SFR A)
Receiver FIFO Interrupt Level (RxFIL A)
Transmitter FIFO Interrupt Level (TxFIL A)
System Enable Status (SES B)
Xon Character Register (XonCR B)
Xoff Character Register (XoffCR B)
Address Recognition Character (ARCR B)
Xon/Xoff Interrupt Status Register (XISR B)
Special Function Register (SFR B)
Receiver FIFO Interrupt Level (RxFIL B)
Transmitter FIFO Interrupt Level (TxFIL B)
Bidding Control Register – Break Change (BCRBRK A)
Bidding Control Register – Change of State (BCRCOS A)
Bidding Control Register – Counter/Timer (BCRCT A)
Bidding Control Register – Xon (BCRx A)
Bidding Control Register – Address (BCRA A)
Bidding Control Register – Loop Back Error (BCRLBE A)
Bidding Control Register – Break Change (BCRBRK B)
Bidding Control Register – Change of State (BCRCOS B)
Bidding Control Register – Counter/Timer (BCRCT B)
Bidding Control Register – Xon (BCRx B)
Bidding Control Register – Address (BCRA B)
Bidding Control Register – Loop Back Error (BCRLBE B)
53
WRITE
Watchdog, Character and X Enable(WCXER A)
Xon Character Register (XonCR A)
Xoff Character Register (XoffCR A)
Address Recognition Character (ARCR A)
Special Function Register (SFR A)
Receiver FIFO Interrupt Level (RxFIL A)
Transmitter FIFO Interrupt Level (TxFIL A)
Watchdog, Character and X Enable (WCXER B)
Xon Character Register (XonCR B)
Xoff Character Register (XoffCR B)
Address Recognition Character (ARCR B)
Special Function Register (SFR B)
Receiver FIFO Interrupt Level (RxFIL B)
Transmitter FIFO Interrupt Level (TxFIL B)
Bidding Control Register – Break Change (BCRBRK A)
Bidding Control Register – Change of State (BCRCOS A)
Bidding Control Register – Counter/Timer (BCRCT A)
Bidding Control Register – Xon (BCRx A)
Bidding Control Register – Address (BCRA A)
Bidding Control Register – Loop Back Error (BCRLBE A)
Bidding Control Register – Break Change (BCRBRK B)
Bidding Control Register – Change of State (BCRCOS B)
Bidding Control Register – Counter/Timer (BCRCT B)
Bidding Control Register – Xon (BCRx B)
Bidding Control Register – Address (BCRA B)
Bidding Control Register – Loop Back Error (BCRLBE B)
Objective specification
SC28L202