SC28L202 Philips Semiconductors, SC28L202 Datasheet - Page 38

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SC28L202

Manufacturer Part Number
SC28L202
Description
Dual universal asynchronous receiver/transmitter DUART
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
TxFIL – Transmitter FIFO Interrupt Level A and B
The position in the Tx FIFO that caused the transmitter will enter the interrupt arbitration process. This register is used to offset the effect of the
arbitration threshold. It use may yield moderate improvements in the interrupt service. It will also “equalize” interrupt latency and allow for larger
aggregate block transfers between fast and slow channels. Writing to this register removes the interrupt control established in MR0 and MR1.
TxEL – Transmitter FIFO Empty Level Register
The number of empty bytes in the Transmitter FIFO
Registers for Character Recognition
XonCR – Xon/Xoff Character Register A and B
An 8–bit character register that contains the compare value for a Xon character.
XoffCR – Xoff Character Register A and B
An 8–bit character register that contains the compare value for a Xoff character.
ARCR – Address Recognition Character Register A and B
An 8 bit character register that contains the compare value for the wake–up address character
2000 Feb 10
Bits 7:0
Any one of 256 FIFO empty positions
Bits 7:0
Channel byte count code ** (1) = implied ‘1’
00000001 = 1
00000010 = 2
to
11111111 = 255
**(1)00000000 = 256 if TxRDY status bit is set.
Dual UART
Bits 7:0
8 Bits of the Xon Character Recognition (Resets to 0x11)
Bits 7:0
8 Bits of the Xoff Character Recognition (Resets to 0x13)
Bits 7:0
8 Bits of the Multi–Drop Address Character Recognition (Resets to 0x00)
32
Objective specification
SC28L202

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