SC28L202 Philips Semiconductors, SC28L202 Datasheet - Page 24

• Manufacturer Part Number: SC28L202
• Description: Dual universal asynchronous receiver/transmitter DUART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
software reset. The last option results in the loss of the
untransmitted contents of the TxFIFO. When operating in this mode
the Command Register commands for the transmitter are not
effective.
While idle data may be written to the TxFIFO and it continue to
present its fill level to the interrupt arbiter and maintains the integrity
of its status registers.
Use of ’00’ as a Xon/Xoff character is complicated by the Receiver
break operation which loads a ’00’ character on the RxFIFO. The
Xon/Xoff character detectors do not discriminate in this case from a
Xon/Xoff character received through the RxD pin.
NOTE: To be recognized as a Xon or Xoff character, the receiver
must have room in the RxFIFO to accommodate the character. An
Xon/Xoff character that is received resulting in a receiver overrun
does not effect the transmitter nor is it loaded into the RxFIFO,
regardless of the state of the Xon/Xoff transparency bit, MR0 (7).
Receiver Mode
Since the receiving FIFO resources in the Dual UART are limited,
some means of controlling a remote transmitter is desirable in order
to lessen the probability of receiver overrun. The Dual UART
provides two methods of controlling the data flow. There is a
hardware–assisted means of accomplishing control, the so–called
out–of–band flow control, and an in–band flow control method.
The out–of–band flow control is implemented through the
CTSN–RTSN signaling via the I/O ports. The operation of these
hardware handshake signals is described in the receiver and
transmitter discussions.
In–band flow control is a protocol for controlling a remote transmitter
by embedding special characters within the message stream, itself.
Two characters, Xon and Xoff, which do not represent normal
printable character take on flow control definitions when the
Xon/Xoff capability is enabled. Flow control characters received may
be used to gate the channel transmitter on and off. This activity is
referred to as Auto–transmitter mode. To protect the channel
receiver from overrun, fixed fill levels (hardware set at 240
characters) of the RxFIFO may be employed to automatically insert
Xon/Xoff characters in the transmitter’s data stream. This mode of
operation is referred to as auto–receiver mode. Commands issued
by the host CPU via the CR can simulate all these conditions.
Auto Receive and Transmit
This is a combination of both modes.
NOTE: Xon /Xoff characters
The Xon/Xoff character with errors will be accepted as valid. The
user has the option sending or not sending these characters to the
FIFO. Error bits associated with Xon/Xoff will be stored normally to
the receiver FIFO.
The channel’s transmitter may be programmed to automatically
transmit a Xoff character without host CPU intervention when the
RxFIFO fill level exceeds a fixed limit (240). In this mode it will
transmit a Xon character when the RxFIFO level drops below a
second fixed limit (16). A character from the TxFIFO that has been
loaded into the TxD shift register will continue to transmit.
Character(s) in the TxFIFO that have not been loaded to the
transmitter shift register are unaffected by the Xon or Xoff
transmission. They will be transmitted after the Xon/Xoff activity
concludes.
If the fill level condition that initiates Xon activity negates before the
flow control character can begin transmission, the transmission of
2000 Feb 10
Dual UART
18
the flow control character will not occur. That is, either of the
following sequences may be transmitted depending on the timing of
the FIFO level changes with respect to the normal character times:
Fix This
Character
Character
Hardware keeps track of Xoff characters sent that are not rescinded
by a Xon. This logic is reset by writing MR0 (3) to ’0’. If the user
drops out of Auto–receiver mode while the XISR shows Xoff as the
last character sent the Xon/Xoff logic would not automatically send
the negating Xon.
The kill CRTX command (of the command register) can be used to
cleanly terminate any pending CRTX commands.
NOTE: In no case will a Xon/Xoff character transmission be aborted.
Once the character is loaded into the TX Shift Register, transmission
continues until completion or a chip reset or transmitter reset is
encountered. The kill CRTX command has no effect in either of the
Auto modes.
Xon/Xoff Interrupts
The Xon/Xoff logic generates interrupts only in response to
recognizing either of the characters in the XonCR or XoffCR (Xon or
Xoff Character Registers). The transmitter activity initiated by the
Xon/Xoff logic or any CR command does not generate an interrupt.
The character comparators operate regardless of the value in MR0
(3:2). Hence the comparators may be used as general–purpose
character detectors by setting MR0 (3:2)=’00’ and enabling the
Xon/Xoff interrupt in the IMR.
The Dual UART can present the Xon/Xoff recognition event to the
interrupt arbiter for IRQN generation. The IRQN generation may be
masked by setting bit 4 of the Interrupt Mask Register, IMR. The bid
level of a Xon/Xoff recognition event is controlled by the Bidding
Control Register X, BCRx, of the channel. The interrupt status can
be examined in ISR [4]. If cleared, no Xon/Xoff recognition event is
interrupting. If set, a Xon or Xoff recognition event has been
detected. The X Interrupt Status Register, XISR, can be read for
details of the interrupt and to examine other, non–interrupting, status
of the Xon/Xoff logic. Refer to the XISR in the Register Descriptions.
The character recognition function and the associated interrupt
generation is disabled on hardware or software reset.
Multi–drop or Wake up or 9 bit mode
This mode is used to address a particular UART among a group
connected to the same serial data source. Normally it is
accomplished by redefining the meaning of the parity bit such that it
indicates a character as address or data. While this method is fully
supported in the SC28L202 it also supports recognition of the
character itself. Upon recognition of its address the receiver will be
enabled and data loaded onto the RxFIFO.
Further the Address recognition has the ability, if so programmed, to
disable (not reset) the receiver when an address is seen that is not
recognized as its own. The particular features of ”Auto Wake and
Auto Doze” are described in the detail descriptions under “Receiver
Operation” above.
NOTE: Care should be taken in the programming of the character
recognition registers. Programming x’00, for example, may result in
a break condition being recognized as a control character. This will
be further complicated when binary data is being processed.
Xoff
Character
Xon
Objective specification
SC28L202
Character