IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 133

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

Auxiliary Initialization Control Register
PRGD Registers
Enable Control Register
Feedback Configuration Register
Bandwidth Control Register
INIT_TRIG
AUTO_SYNCH
FBC
FBC
FBC
FBC
IDT IDT88K8483
GEN
DEN
BW
Field
Field
Field
Field
R/W
R/W
R/W
R/W
R/W
R/W
Table 128 Auxiliary Initialization Control Register
R/W
Read/
Write
R/W
R/W
Read/
Write
Read /
Write
Read/
Write
Table 130 Feedback Configuration Register (Block Base=0x0B00, Register Offset=0x01)
Table 129 Enable Control Register
Table 131 Bandwidth Control Register (Block Base=0x0B00, Register Offset=0x02)
0:0
0:1
0:0
0:1
0:0 - 0:7
1:0 - 1:7
2:0 - 2:7
3:0 - 3:7
Bits
Bits
0:0 - 0:1
Bits
Bits
1
1
Length
1
1
8
8
8
8
Length
Length
2
Length
0
1
Reset
State
0
0
Reset
state
0
0xC0
0
0
133 of 162
(Block Base=
Reset
State
11
Write 1 to initialize synchronization of the auxiliary interface.
0:Test mode,
1:Embedded software controls initialization of the synchronization.
Reset
State
(Block Base=
This bit enables or disables the PRBS generator.
0: Disable PRBS generator.
1: Enable PRBS generator.
This bit enables or disables the PRBS detector.
0: Disable PRBS detector.The received PRBS is not detected and the payload
is discarded.
1: Enables PRBS detector to detect the received PRBS.
This field defines the feedback function for generating the PRBS
sequence.
This field defines the feedback function for generating the PRBS
sequence.
This field defines the feedback function for generating the PRBS
sequence.
This field defines the feedback function for generating the PRBS
sequence.
0x0B00
This field defines the bandwidth level for the PRBS generator and
checker as shown in Table 126.
0x0A00
, Register Offset=0x00)
, Register Offset=0x013)
Description
Description
Description
Description
October 20, 2006