ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 24

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

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KBSIN7-0
KBSOUT15-0
PA6-0
PB7-0
PC2-0
PC7-3
PD7-0
PE1,0
PF7-0
PFAIL
PFS
PG4-0
PH5-0
PLI
PSCLK1
PSCLK2
PSCLK3
PSDAT1
PSDAT2
PSDAT3
RD
RING
SCL
SDA
SEL0
SEL1
SELIO
SHBM
SWIN
TA
Signal
1
1
1
1
1
1
64-62, 59, 58 70-68, 65, 64 TTL-PU
84, 83, 80-75 94, 93, 86-81 TTL
121, 120,
149, 148,
138-131
103, 96,
160-pin
122, 10
97, 119,
27-34
35-50
72-65
57-55
89-94
9, 8,
143,
100
101
100
122
73
91
90
52
54
64
51
53
63
65
66
67
95
96
72
68
Pin Number
135, 130,
113, 106,
107, 129,
163, 162,
152-145
176-pin
136, 12
11, 10,
99-104
37-42,
29-36
47-56
78-71
63-61
157
101
110
100
111
105
106
110
136
79
58
60
70
57
59
69
71
72
73
78
74
Signal/Pin Connection and Description
CMOSS-PU -
-
TTL-PU
TTL-PU
TTL-PU
TTL-PU
TTL
CMOSS
-
TTL
TTL
-
TTL-PU
TTL-PU
TTL-PU
TTL-PU
TTL-PU
TTL-PU
-
CMOSS
CMOSS-PU OD-PU
CMOSS-PU OD-PU
-
-
-
STRAP
STRAP
TTL
Input
Buffer Type
24
OD
CM-PU
CM-PU
CMHD1-PU
CM-PU
-
CM-PU
CM
-
CM
CM
CM
CM
CMHD1-PU
CMHD1-PU
CMHD1-PU
CMHD1-PU
CMHD1-PU
CMHD1-PU
CMHD
-
CM
CM
CM
-
-
CM
Output
1
1
1
1
1
1
Internal Keyboard Input scan lines
Internal Keyboard Output scan lines
Port A, bits 0 through 6
Port B, bits 0 through 7
Port C, bits 0 through 2 high drive output buffers
Port C, bits 3 through 7
Port D, bits 0 through 7, input port only
Port E, bits 0 through 1
Port F, bits 0 through 7
Power
detected
Pipe Flow Status signal
Port G, bits 0 through 4
Port H, bits 0 through 5
Pipe Long Instruction signal
PS/2 Channel 1 Clock signal
PS/2 Channel 2 Clock signal
PS/2 Channel 3 Clock signal
PS/2 Channel 1 Data signal
PS/2 Channel 2 Data signal
PS/2 Channel 2 Data signal
Read control signal. May be used as Output
Enable.
Advanced Power Control Ring detect and wake-
up input
ACCESS.bus Serial Clock signal
ACCESS.bus Serial Data signal
Zone Select 0. Chip-select signal for the Exter-
nal Memory.
Zone Select 1. Used to select the off-chip Base
Memory.
I/O Expansion chip-select signal
Shared host BIOS Memory. Enable when 0
On switch to the MIWU and ICU
Timer pin A
Fail.
Non-maskable
Function
interrupt
input