ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 54

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

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5.11.5 HDEN Strap
The HDEN strap input pin defines if the legacy devices with-
in the PC87570 are accessible from the host after reset, or
if the host must enable access to them. This impacts the
KBC, the PM, and the RTC/APC. Access to the shared
memory is not affected by this strap.
HDEN is sampled on power-up reset (see Section 2.4), but it
sets the host configuration default value on any reset.
When HDEN is low (0), the HBI is disabled and must be en-
abled using the motherboard PnP protocol.
When HDEN is high (1), the HBI is enabled with its default
legacy addresses.
5.11.6 GA20 Pin Functionality
The GA20 (Gate Address A20) is intended to implement the
memory management in a PC architecture. This allows the
access to the extended memory needed by the operating
system. In PC87570, the GA20 function is implemented by
a port used as an output. Port PB5 is recommended to be
used as GA20 since its default state after reset is output
driving high. The firmware running on the CR16A may
change the GA20 pin state by modifying the PBDOUT reg-
ister, bit 5. There is no special hardware or multiplexing on
this pin. Since there is no multiplexing, the PBALT bit 5, is
always 0, and any writes to it are disregarded. The pin may
be used as a GPIO. However, please note that this pin
wakes up differently than the other seven pins in the same
port, which are waking up as inputs.
5.11.7 Host Driven Wake-Up
When the PC87570 is in Idle mode, it will wake-up to Active
mode in response to an access on the host interface bus. A
wake-up event is sent to the MIWU (WUI26) in any of the
following cases:
5.11.8 APC-ON and APC-OFF Events
The APC sends APC-ON to indicate a wake-up request,
and APC-OFF to indicate an off command from the host.
The APC-OFF event is enabled using APCOFFE in the
CST2 Register. To disable APC-OFF, clear this bit (and not
the MIWU Enable bit).
Either HMEMWR or HMEMRD is active, together with
HMEMCS
Either HIORD or HIOWR is active, and the host ac-
cesses an enabled device at its valid address (i.e., ei-
ther KBC, PM, RTC, APC or the host configuration
registers).
SHBM=0 & HRMS=1
Access cannot be completed
CST2.HRSTO
HMEMRD or HMEMWR are
active while MEMCS is active
Figure 5-5. HRSTO Generation Scheme
Host Bus Interface (HBI)
54
5.12 HBI REGISTERS ACCESSED BY CR16A
The PC87570 has 15 CR16A-accessed registers that con-
trol the host interface channel, listed with their addresses in
Table 5-2.
CST1
CST2
RTCCA
RTCCD
HCFGBAL Host Configuration Base Address
HCFGBAH Host Configuration Base Address
HICTRL
HIIRQC
HIKMST
HIKDO
HIMDO
HIKMDI
HIPMST
HIPMDO
HIPMDI
Mnemonic
Extend Logic
Table 5-2. HBI Registers Accessed by CR16A
Host Reset
Control and Status Register 1
Control and Status Register 2
RTC Core Address Register
RTC Core Data Register
Low
High
Host Interface Control Register
Host Interface IRQ Control Register FEA2h
Host Interface KBC Status Register FEA4h
Host Interface Keyboard Data Out
Buffer Register
Host Interface Mouse Data Out
Buffer Register
Host Interface KBC Data In Buffer
Register
Host Interface PM Port Status
Register
Host Interface PM Data Out Buffer
Register
Host Interface PM Data In Buffer
Register
Register Name
HRSTO
Address
F900h
F902h
F904h
F906h
F908h
F90Ah
FEA0h
FEA6h
FEA8h
FEAAh
FEACh
FEAEh
FEB0h