ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 31

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

2.8.1
Base Memory Configuration
The environment setting controls the use of on-chip Base
Memory (ROM), or off-chip Base Memory. In all cases, the
memory access parameters (i.e., the number of wait and
hold cycles) are as defined for zone1 of the BIU.
On-Chip Base Memory
In IRE environment, on-chip ROM is used as Base Memory,
as shown in Figure 2-2. To maximize on-chip ROM perfor-
mance, configure the BIU as described in Section 3.6 on
page 46.
0FB00h
0FC00h
08000h
00000h
00800h
0E000h - 0EFFFh
0F000h
0F980h
10800h
10000h
20000h
00000h
0F400h - 0F8FFh
0F90Bh - oF97Fh
0F990h - 0FAFFh
10000h
0F900h
Accessing Base Memory
1. See Section 2.8.1 for details.
2. See Section 2.8.2 for details.
3. When MCFG.A15E = 1; otherwise reserved.
4. See Appendix A on page 156 for details of the implemented registers.
IOCHRDY
ROMOE
MEMWR
Address
ROMCS
IOWR
A0-18
IORD
D0-7
AEN
-
0F90Ah
0DFFFh
0DFFFh
1FFFFh
1FFFFh
3FFFFh
007FFh
07FFFh
0F3FFh
0F98Fh
0FBFFh
107FFh
0FFFFh
Figure 2-1. Sharing PC87570 Program Memory and BIOS Flash Memory
(Bytes)
128K
1280
Size
30K
24K
56K
117
368
256
62K
64K
2K
4K
1K
11
16
1K
2K
IORD
IOWR
MEMRD
MEMWR
MEMCS
HA0-18
HIOCHRDY
HD0-7
HAEN
Signal/Pin Connection and Description
Table 2-6. PC87570 Memory Map
Base Memory
Base Memory
Shadow On
Reserved
PC87570
On-chip modules registers
1
31
BIU Registers
I/O Expansion
Base Memory
Base Memory
System RAM
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Off-Chip Base Memory
In IRD and Dev environments (when on-chip ROM is not
available), the code and constant data are stored in off-chip
Base Memory. This off-chip Base Memory has 64 Kbytes of
address space (10000h - 1FFFFh). The first 56 Kbyte are
also shadowed to address (00000h - 0DFFFh), when
MCFG.SHOFF=0. Off-chip accesses to this memory zone
are indicated by the SEL1 output.
mapped to the PC87570’s address space.
Figure 2-3 illustrates how off-chip Base Memory is
HBI
SHBM
A0-18
SEL0
WR0
External Memory
D0-7
External Memory
External Memory
RD
Shadow Off
4
4
2
3
A0-18
CS
D0-7
WR
RD
Memory
Environment
BIOS
Flash
IRD, Dev
IRD, Dev
IRE
IRE
All
All
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