upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 161
upd78f0148m1gka1-9eu
Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0148M1GKA1-9EU.pdf
(668 pages)
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(1) TI00n pin valid edge selected as capture trigger (CRC0n1 = 1, CRC0n0 = 1)
(2) TI01n pin valid edge selected as capture trigger (CRC0n1 = 0, CRC0n0 = 1)
Remarks 1. Setting ES0n1, ES0n0 = 1, 0 and ES1n1, ES1n0 = 1, 0 is prohibited.
Falling edge
Rising edge
No capture operation
Falling edge
Rising edge
Both rising and falling edges
Cautions 1. Set a value other than 0000H to CR00n in the mode in which clear & start occurs on a match
CR00n Capture Trigger
CR00n Capture Trigger
2. ES0n1, ES0n0:
3. n = 0:
ES1n1, ES1n0:
CRC0n1, CRC0n0: Bits 1 and 0 of capture/compare control register 0n (CRC0n)
n = 0, 1:
2. If CR00n is set to 0000H in the free-running mode and in the clear mode using the valid edge
3. When the valid edge of the TI01n pin is used, P01 or P06 cannot be used as the timer output
4. When CR00n is used as a capture register, read data is undefined if the register read time
5. Do not rewrite CR00n during TM0n operation.
Table 7-2. CR00n Capture Trigger and Valid Edges of TI00n and TI01n Pins
of TM0n and CR00n.
of the TI00n pin, an interrupt request (INTTM00n) is generated when the value of CR00n
changes from 0000H to 0001H following TM0n overflow (FFFFH). Moreover, INTTM00n is
generated after a match of TM0n and CR00n is detected, a valid edge of the TI01n pin is
detected, or the timer is cleared by a one-shot trigger.
(TO0n) pin. Moreover, when the TO0n pin is used, the valid edge of the TI01n pin cannot be
used.
and capture trigger input conflict (the capture data itself is the correct value).
If timer count stop and capture trigger input conflict, the captured data is undefined.
µ
µ
PD780143, 780144
PD780146, 780148, 78F0148
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Bits 5 and 4 of prescaler mode register 0n (PRM0n)
Bits 7 and 6 of prescaler mode register 0n (PRM0n)
Rising edge
Falling edge
Both rising and falling edges
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U15947EJ3V1UD
TI00n Pin Valid Edge
TI01n Pin Valid Edge
ES0n1
ES1n1
0
0
1
0
0
1
ES0n0
ES1n0
1
0
1
0
1
1
161
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