upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 384

• Manufacturer Part Number: upd78f0148m1gka1-9eu
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

384
SIOA0 write
(2) 1-byte transmission/reception communication operation
SCKA0
ACSIIF
SOA0
TSF0
SIA0
(a) 1-byte transmission/reception
When bit 7 (CSIAE0) and bit 6 (ATE0) of serial operation mode specification register 0 (CSIMA0) = 1, 0,
respectively, if communication data is written to serial I/O shift register 0 (SIOA0), the data is output via
the SOA0 pin in synchronization with the SCKA0 falling edge, and then input via the SIA0 pin in
synchronization with SCKA0 falling edge, and stored in the SIOA0 register in synchronization with the
rising edge 1 clock later.
Data transmission and data reception can be performed simultaneously.
If only reception is to be performed, communication can only be started by writing a dummy value to the
SIOA0 register.
When communication of 1 byte is complete, an interrupt request signal (INTACSI) is generated.
In 1-byte transmission/reception, the setting of bit 5 (ATM0) of CSIMA0 is invalid.
Be sure to read data after confirming that bit 0 (TSF0) of serial status register 0 (CSIS0) = 0.
Caution The SOA0 pin becomes low level by an SIOA0 write.
1
Figure 17-10. 3-Wire Serial I/O Mode Timing
DO7
DI7
CHAPTER 17 SERIAL INTERFACE CSIA0
Transfer starts at falling edge of SCKA0
2
DO6
User’s Manual U15947EJ3V1UD
DI6
3
DO5
DI5
4
DO4
DI4
5
DO3
DI3
6
DO2
DI2
7
DO1
DI1
End of transfer
8
DI0
DO0