upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 406
upd78f0148m1gka1-9eu
Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
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SCKA0
BUSY0
ACSIIF
Figure 17-27. Operation Timing When Busy & Strobe Control Options Are Used (When BUSYLV0 = 1)
SOA0
STB0
TSF0
SIA0
(b) Busy & strobe control option
Strobe control is a function used to synchronize data transmission/reception between the master and
slave devices.
transmission/reception has been completed. By this signal, the slave device can determine the timing of
the end of data transmission. Therefore, synchronization is established even if a bit shift occurs because
noise is superimposed on the serial clock, and transmission of the next byte is not affected by the bit
shift.
To use the strobe control option, the following conditions must be satisfied:
• Bit 6 (ATE0) of the serial operation mode specification register 0 (CSIMA0) is set to 1.
• Bit 5 (STBE0) of serial status register 0 (CSIS0) is set to 1.
Usually, the busy control and strobe control options are simultaneously used as handshake signals. In
this case, the strobe signal is output from the STB0/P145 pin, the BUSY0/BUZ/INTP7/P141 pin can be
sampled to keep transmission/reception waiting while the busy signal is input.
A high level lasting for one transfer clock is output from the STB0/P145 pin in synchronization with the
falling edge of the ninth serial clock as the strobe signal. The busy signal is detected at the rising edge of
the serial clock two clocks after 8-bit data transmission/reception completion.
When the strobe control option is not used, the P145/STB0 pin can be used as a normal I/O port pin.
Figure 17-27 shows the operation timing when the busy & strobe control options are used.
When the strobe control option is used, the interrupt request flag (ACSIIF) that is set on completion of
transmission/reception is set after the strobe signal is output.
Caution When TSF0 is cleared, the SOA0 pin goes low.
Remark
D7
D7 D6 D5 D4 D3 D2 D1 D0
D6 D5 D4 D3 D2 D1 D0
ACSIIF: Interrupt request flag
TSF0:
The master device outputs the strobe signal from the STB0/P145 pin when 8-bit
Bit 0 of serial status register 0 (CSIS0)
CHAPTER 17 SERIAL INTERFACE CSIA0
User’s Manual U15947EJ3V1UD
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Busy input released
Busy input valid
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