upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 408

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upd78f0148m1gka1-9eu

Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
408
(5) Automatic transmit/receive interval time
SCKA0
ACSIIF
SOA0
SIA0
When using the automatic transmit/receive function, the read/write operations from/to the internal buffer RAM
are performed after transmitting/receiving one byte.
transmit/receive operation.
Since the read/write operations from/to the buffer RAM are performed in parallel with the CPU processing
when using the automatic transmit/receive function by the internal clock, the interval depends on the value
which is set in automatic data transfer interval specification register 0 (ADTI0) and bits 5 and 4 (STBE0,
BUSYE0) of serial status register 0 (CSIS0). When ADTI0 is cleared to 00H, an interval time based on the
STBE0 and BUSYE0 settings is generated.
For example, when ADTI0 = 00H and STBE0 = BUSYE0 = 1, an interval time of two clocks is generated. If
an interval time of two clocks or more is set by ADTI0, the interval time set by ADTI0 is generated regardless
of the STBE0 and BUSYE0 settings.
Example Interval time when busy signal is not generated
ACSIIF:
<1> When STBE0 = 1, BUSYE0 = 0: Interval time of two serial clocks is generated
<2> When STBE0 = 0, BUSYE0 = 1: Interval time of one serial clock is generated
<3> When STBE0 = 1, BUSYE0 = 1: Interval time of two serial clocks is generated
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Interrupt request flag
Figure 17-29. Automatic Transmit/Receive Interval Time
CHAPTER 17 SERIAL INTERFACE CSIA0
User’s Manual U15947EJ3V1UD
Interval
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Therefore, an interval is inserted before the next

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