pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 253
pc87317vul
Manufacturer Part Number
pc87317vul
Description
Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87317VUL.pdf
(272 pages)
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14.3.10 DMA Timing
t
t
t
t
t
t
t
t
t
t
t
t
KI
KK
KQ
QK
QP
QQ
QR
QW
QT
RQ
TQ
TT
Symbol
DRQ
DACK
RD, WR
1. t
2. Only in case of pending DRQ.
3. Values shown are with the FIFO disabled, or with FIFO enabled and THRESH = 0. For nonzero values
4. The active edge of RD or WR and TC is recognized only when DACK is active.
TC
of THRESH, add (THRESH x 8 x t
DRP
DACK Inactive Pulse Width
DACK Active Pulse Width
DACK Active Edge to DRQ Inactive
DRQ to DACK Active Edge
DRQ Period (Except Non-Burst DMA)
DRQ Inactive Non-Burst Pulse Width
DRQ to RD, WR Active
DRQ to End of RD, WR (DRQ Service Time)
DRQ to TC Active (DRQ Service Time)
RD, WR Active Edge to DRQ Inactive
TC Active Edge to DRQ Inactive
TC Active Pulse Width
and t
t
ICP
QK
are defined in TABLE 14-43 "Nominal tICP, tDRP Values" on page 245.
t
QT
Parameter
t
QR
FIGURE 14-14. FDC DMA Timing
TABLE 14-51. FDC DMA Timing
DRP
) to the values shown.
Device Specifications
t
4
QW
253
t
KK
t
t
TT
KQ
t
t
8 x t
QP
TQ
t
RQ
Min
300
25
65
10
15
50
DRP
1
(8 x t
(8 x t
DRP
DRP
)
)
400
Max
65
65
75
(16 x t
(16 x t
2
ICP
ICP
t
KI
t
)
)
QQ
1 3
1 3
www.national.com
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
Unit
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