tda8296 NXP Semiconductors, tda8296 Datasheet - Page 48

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tda8296

Manufacturer Part Number
tda8296
Description
Tda8296 Digital Global Standard Low If Demodulator For Analog Tv And Fm Radio
Manufacturer
NXP Semiconductors
Datasheet

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Quantity
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Part Number:
TDA8296
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
TDA8296
Product data sheet
Table 55.
Legend: * = default value.
Table 56.
Table 57.
Legend: * = default value.
Bit
3 to 0
HVPLL_BUS bit
GPx_CF[3:0] = 1011
GPx_CF[3:0] = 1010
GPx_CF[3:0] = 1001
GPx_CF[3:0] = 1000
GPx_CF[3:0] = 0111
GPx_CF[3:0] = 0110
GPx_CF[3:0] = 0101
GPx_CF[3:0] = 0100
Bit
7 to 5
4 and 3 -
2
1
0
Symbol
GP2_CF[3:0] R/W
Symbol
-
GP2_VAL
GP1_VAL
GP0_VAL
GPIOREG_1 register (address 45h) bit description
HVPLL signal configuration
GPIOREG_2 register (address 46h) bit description
Digital global standard low IF demodulator for analog TV and FM radio
All information provided in this document is subject to legal disclaimers.
Access Value
Rev. 1 — 3 March 2011
Access Value
R/W
R/W
R/W
R/W
R/W
0000
0001*
0011
0100
to
1011
XXXX
000*
00*
1*
1*
1*
Description
It determines how the general purpose pin GPIO2 is
configured.
Description
reserved, must be set to logic 000
not used
GP2_VAL controls the value of the pin GPIO2 when
GP2_CF[3:0] = 0001. When GP2_CF[3:0] = 0000,
GPIO2 is an input pin which value can be read
through the I
GP1_VAL controls the value of the pin GPIO1 when
GP1_CF[3:0] = 0001. When GP1_CF[3:0] = 0000,
GPIO1 is an input pin which value can be read
through the I
GP0_VAL controls the value of the pin GPIO0 when
GP0_CF[3:0] = 0001. When GP0_CF[3:0] = 0000,
GPIO0 is an input pin which value can be read
through the I
The GPIO2 pin is in Input mode. The input value is
stored in GP2_VAL.
The GPIO2 pin is in Open-drain mode. The output
value is determined by GP2_VAL.
The GPIO2 pin is in Output mode. The PLL output
clock divided by two is delivered.
The GPIO2 pin is in Output mode. HVPLL signals are
delivered. The HVPLL signal is chosen according to
Table
Don’t care if I2CSW_EN = 1. Then the pad is
configured as I
Signal
V_SYNC
H_SYNC
NOISE_DET
MAC_DET
FIDT
V_LOCK
F_H_LOCK
N_H_LOCK
56.
2
2
2
C-bus stored in GP2_VAL.
C-bus stored in GP1_VAL.
C-bus stored in GP0_VAL.
2
C-bus feed-through.
…continued
TDA8296
© NXP B.V. 2011. All rights reserved.
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