ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 120

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
7
IEN
6
ENAB
5
STA
4
STP
3
IFLG
2
ACK
[1:0]
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
00
(I2C0_CTL = CBh, I2C1_CTL = DBh)
R/W
I
I
The I
ignored.
The I
A Master Mode START condition is sent.
A Master Mode START TRANSMIT condition occurs on the
bus.
A Master Mode STOP condition is sent.
A Master Mode STOP TRANSMIT condition occurs on the
bus.
The I
The I
Not Acknowledge.
Acknowledge.
Reserved.
7
0
2
2
Table 52. I
C interrupt is disabled.
C interrupt is enabled.
2
2
2
2
C interrupt flag is not set.
C interrupt flag is set.
C bus (SCLx/SDAx) is disabled and all inputs are
C bus (SCLx/SDAx) is enabled.
R/W
6
0
PRELIMINARY
2
C Control Registers
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
I
2
C Serial I/O Interface
R/W
0
0
106