ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 68

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Chip Select Registers
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
CS_LBR
(CS0_LBR = A8h, CS1_LBR = ABh, CS2_LBR = AEh, CS3_LBR = B1h)
Chip Select x Lower Bound Register
For Memory Chip Selects, the Chip Select x Lower Bound register, detailed in
Table
ing Memory Chip Select, if enabled, can be active. For I/O Chip Selects, this regis-
ter defines the address to which ADDR[11:4] is compared to generate an I/O Chip
Select. All Chip Select lower bound registers reset to
18, defines the lower bound of the address range for which the correspond-
Value Description
00h–
FFh
Table 18. Chip Select x Lower Bound Register
For Memory Chip Selects (CS_IO = 0)
This bit specifies the lower bound of the Chip Select address
range. The upper byte of the address bus, ADDR[23:16], is
compared to the values contained in these registers for
determining if a Memory Chip Select signal should be generated.
For I/O Chip Selects (CS_IO = 1)
This bit specifies the Chip Select address value. ADDR[11:4] is
compared to the values contained in these registers for
determining if an I/O Chip Select signal should be generated.
R/W
7
0
R/W
6
0
PRELIMINARY
R/W
5
0
R/W
4
0
R/W
3
0
eZ80190 Product Specification
00h
R/W
2
0
.
Chip Selects and Wait States
R/W
1
0
R/W
0
0
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