ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 62
ez80190
Manufacturer Part Number
ez80190
Description
Ez80190 Microprocessor
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80190.pdf
(222 pages)
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PS006613-0306
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Port x Data Direction Registers
In conjunction with the other GPIO Control Registers, the Port x Data Direction
registers, detailed in
See
Port x Alternate Registers 1
In conjunction with the other GPIO Control Registers, the Port x Alternate
Register 1, detailed in
pins. See
Port x Alternate Registers 2
In conjunction with the other GPIO Control Registers, the Port x Alternate
Register 2, detailed in
pins. See
(PA_ALT1 = 98h, PB_ALT1 = 9Ch, PC_ALT1 = A0h, PD_ALT1 = A4h)
(PA_ALT2 = 99h, PB_ALT2 = 9Dh, PC_ALT2 = A1h, PD_ALT2 = A5h)
(PA_DDR = 97h, PB_DDR = 9Bh, PC_DDR = 9Fh, PD_DDR = A3h)
Table 12
Table 12
Table 12
Table 14. Port x Data Direction Registers
on page 44 for more information.
Table 15. Port x Alternate Registers 1
Table 16. Port x Alternate Registers 2
R/W
R/W
R/W
7
1
7
0
7
0
on page 44 for more information.
on page 44 for more information.
Table
Table
Table
R/W
R/W
R/W
6
1
6
0
6
0
14, control the operating modes of the GPIO port pins.
PRELIMINARY
15, control the operating modes of the GPIO port
16, control the operating modes of the GPIO port
R/W
R/W
R/W
5
1
5
0
5
0
R/W
R/W
R/W
4
1
4
0
4
0
R/W
R/W
R/W
3
1
3
0
3
0
eZ80190 Product Specification
R/W
R/W
R/W
2
1
2
0
2
0
General-Purpose Input/Output
R/W
R/W
R/W
1
1
1
0
1
0
R/W
R/W
R/W
0
1
0
0
0
0
48
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