ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 74
ez80190
Manufacturer Part Number
ez80190
Description
Ez80190 Microprocessor
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80190.pdf
(222 pages)
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Universal ZiLOG Interface
PS006613-0306
The eZ80190 device features two on-chip Universal ZiLOG Interface (UZI)
devices. Each UZI contains three serial communication controller blocks: a Serial
Peripheral Interface (SPI), a Universal Asynchronous Receiver/Transmitter
(UART), and an Inter-Integrated Circuit serial bus (I
one of these three communication controllers can be enabled. The UZI devices
are connected to General-Purpose I/O pins on Port C (UZI 1) and Port D (UZI 0).
Ports C and D must be configured for alternate-function I/O to allow the UZI
devices to communicate via the Port C and D pins. Each UZI also contains control
registers and a Baud Rate Generator (BRG) that generates a lower-frequency
clock for the SPI and UART devices. The I
tor. The entire UZI block, including the Baud Rate Generator, is inactive when
none of the serial devices are selected.
diagram.
I
2
Interrupt
C
UZI
GPIO Port C (UZI1) or Port D (UZIO)
Figure 11. UZI Block Diagram
To eZ80
UZI Interface
PRELIMINARY
SPI
®
CPU
Data
Figure 11
Address
2
I/O
C block features its own clock genera-
UART
Baud Rate
Generator
illustrates the UZI block
Clock
2
C). For each UZI device, any
Universal
Interface
ZiLOG
Universal ZiLOG Interface
Alternate
Function
Enable
GPIO
60
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