ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 22

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Pin # Symbol
23
24
25
26
27
28
29
ADDR11 Address Bus
ADDR12 Address Bus
ADDR13 Address Bus
ADDR14 Address Bus
ADDR15 Address Bus
V
GND
DD
Table 1. 100-Pin LQFP Pin Identification of the eZ80190 Device (Continued)
Function
Power Supply
Ground
Signal Direction
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
PRELIMINARY
Description
The ADDR11 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR12 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR13 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR14 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
The ADDR15 pin is configured as an output in
normal operation. The address bus selects a
location in memory or I/O space to be read or
written. This pin is configured as an input during
bus acknowledge cycles. Drives the Chip Select/
Wait State Generator block to generate Chip
Selects.
Power Supply
Ground
Architectural Overview
8