ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 39

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Address
(hex)
Chip Select/Wait State Generator (continued)
B0
B1
B2
B3
On-Chip RAM Control
B4
B5
Universal ZiLOG Interface Blocks
B6
B7
B8
B8
B9
BA
BB
BC
BC
BD
BE
BF
C0
C1
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register resets to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the pin value of the port is read.
out reset, the Watch-Dog Timer Control register resets to 20h.
Mnemonic
CS2_CTL
CS3_LBR
CS3_UBR
CS3_CTL
RAM_CTL
RAM_ADDR_U
SPI0_CTL
SPI0_SR
SPI0_RBR
SPI0_TSR
Not Accessible
SPI1_CTL
SPI1_SR
SPI1_RBR
SPI1_TSR
Not Accessible
Not Accessible
Not Accessible
UART0_RBR
UART0_THR
BRG0_DLR_L
BRG0_DLR_H
UART0_IER
Name
Chip Select 2 Control Register
Chip Select 3 Control Register
RAM Control Register
RAM Address Upper Byte
SPI 0 Control Register
SPI 0 Transmit Shift Register
SPI 1 Control Register
SPI1 Receive Buffer Register
SPI1 Transmit Shift Register
UART 0 Receive Buffer Register
UART 0 Transmit Holding Register
BRG 0 Divisor Latch Register—Low Byte
BRG 0 Divisor Latch Register—High Byte
UART 0 Interrupt Enable Register
Chip Select 3 Lower Bound Register
Chip Select 3 Upper Bound Register
SPI 0 Status Register
SPI 0 Receive Buffer Register
SPI 1 Status Register
Table 2. Register Map (Continued)
PRELIMINARY
eZ80190 Product Specification
Reset
(hex)
XX
XX
XX
XX
XX
XX
00
00
00
00
00
00
04
00
04
00
02
00
00
Access
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R
R
R
R
Register Map
Page
56
54
55
56
58
58
87
88
89
88
87
88
89
88
71
70
62
63
72
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