mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 169

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mc68ec060

Manufacturer Part Number
mc68ec060
Description
Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Bus Operation
7-14
The processor asserts transfer start (TS) during C1 to indicate the beginning of a bus cy-
cle. If not already asserted from a previous bus cycle, the transfer in progress (TIP) signal
is also asserted at this time to indicate that a bus cycle is active.
NOTE: It is assumed that the acknowledge termination ignore state capability is disabled.
ADDRESS AND
Figure 7-13. Byte, Word, and Long-Word Read Bus Cycle Timing
ATTRIBUTES
SIZ1–SIZ0
D31–D24
D23–D16
A1–A0
D15–D8
BCLK
D7–D0
R/W
SAS
TS
TA
TIP
BS0
BS1
BS2
BS3
C1
BYTE READ
BYTE
C2
1
M68060 USER’S MANUAL
C1
WORD READ
WITH WAIT
CW
WORD
2
C2
C1
LONG-WORD
READ
LONG
C2
0
MOTOROLA

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