mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 183

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

Bus Operation
7.7.5 Locked Read-Modify-Write Cycles
The locked read-modify-write sequence performs a read, conditionally modifies the data in
the processor, and writes the data out to memory. In the MC68060, this operation can be
indivisible, providing semaphore capabilities for multiprocessor systems. During the entire
7-28
sertion and terminates the line write bus cycle, TIP remains asserted if the processor is
ready to begin another bus cycle. Otherwise, the processor negates TIP during the next
clock. The processor also three-states the data bus during the next clock following termi-
nation of the write cycle.
NOTE: It is assumed that the acknowledge termination ignore state capability is disabled.
MISCELLANEOUS
ATTRIBUTES
SIZ1–SIZ0
BS3–BS0
D31–D0
A31–A4
CIOUT
A1–A0
A3–A2
BCLK
Figure 7-22. Line Write Bus Cycle Timing
R/W
CLA
SAS
TIP
TBI
TA
TS
C1
DRIVE
PRE
M68060 USER’S MANUAL
01
C2
C3
10
C4
11
C5
00
MOTOROLA