mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 413

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

PLPA
Operation:
Assembler
Syntax:
Attributes:
Description:
Condition Codes:
MOTOROLA
function code register (DFC2–DFC0) and the address register (An31–An0), using full
paged MMU functionality including TTRs, and generates a 32-bit physical address,
which is loaded into An. All access error checks are performed during the translation,
including in the checks the read/write instruction type, and an access error exception
will be taken for faulting conditions.
PLPA is a privileged instruction; attempted execution in user mode will result in a priv-
ilege violation exception.
As with normal address translation activity:
Not affected.
If Supervisor State
Else TRAP
PLPAR (An)
PLPAW (An)
Unsized
If Data TTR hit
Else if E bit of TC Register = 0 or MDIS pin asserted
Else if E bit of TC Register =1 and MDIS pin negated and Data ATC hit
Else if E bit of TC Register =1 and MDIS pin negated and Data ATC miss
EndIF
Translates the logical address defined by the contents of the destination
Then Logical Address {DFC,An} translated to Physical
Address An
Then Use TTR translation and An stays the same
Then Use Default TTR translation and An stays the same
Then use ATC translation and An = Physical Address
Then Tablewalk
If Valid Page Descriptor Encountered
Else Take Access Error Exception
Then update Data ATC and An = Physical Address
Load Physical Address
(MC68060, MC68LC060)
M68060 USER’S MANUAL
MC68060 Instructions
PLPA
D-23