mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 322

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

Instruction Execution Timing
10.16 EXCEPTION PROCESSING TIMES
Table 10-26 indicates the number of clock cycles required for exception processing. The
number of clock cycles includes the time spent in the OEP by the instruction causing the
exception, the stacking of the exception frame, the vector fetch, and the fetch of the first
instruction of the exception handler routine. The number of operand read and write cycles
is shown in parentheses (r/w).
10-26
1
2
3
4
CPU Reset
Bus Error
Address Error
Illegal Instruction
Integer Divide By Zero
CHK Instruction
TRAPV, TRAPcc Instructions
Privilege Violation
Trace
Line A Emulator
Line F Emulator
Unimplemented EA
Unimplemented Integer
Format Error
Nonsupported FP
Interrupt
TRAP Instructions
FP Branch on Unordered Condition
FP Inexact Result
FP Divide By Zero
FP Underflow
FP Operand Error
FP Overflow
FP Signaling NAN
FP Unimplemented Data Type
Indicates the time from when RSTI is negated until the first
instruction enters the OEP.
For these entries, add the effective address calculation time.
Assumes either autovector or external vector supplied with zero
For these entries, add the instruction execution time minus 1 if a
post-exception fault occurs.
wait states.
Table 10-26. Exception Processing Times
3
Exception
M68060 USER’S MANUAL
Execution Time
19(1/3)
45(2/0)
20(1/3)
20(1/3)
19(1/3)
19(1/3)
19(1/3)
19(1/3)
19(1/3)
19(1/3)
23(1/2)
19(1/4)
19(1/3)
19(1/2)
19(1/3)
19(1/2)
19(1/2)
19(1/2)
19(1/2)
19(1/2)
23(1/2)
19(1/3)
19(1/2)
21(1/3)
19(1/3)
1
2
2
4
4
4
4
4
4
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