mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 93

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mc68ec060

Manufacturer Part Number
mc68ec060
Description
Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Management Unit
4.3 ADDRESS TRANSLATION CACHES
The ATCs in the MMUs are four-way set-associative caches that each store 64 logical-to-
physical address translations and associated page information similar in form to the corre-
sponding page descriptors in memory. The purpose of the ATC is to provide a fast mecha-
nism for address translation by avoiding the overhead associated with a table search of the
logical-to-physical mapping of recently used logical addresses. Figure 4-19 illustrates the
organization of the ATC.
Each ATC entry consists of a physical address, attribute information from a corresponding
page descriptor, and a tag that contains a logical address and status information. Figure 4-
20, which illustrates the entry and tag fields, is followed by field definitions listed in alphabet-
ical order.
4-24
C
F
2
31
17
PAGE SIZE
PAGE FRAME
16
SELECT
MUX
SET
4
1
1
16
3
1
12
Figure 4-19. ATC Organization
PAGE OFFSET
M68060 USER’S MANUAL
SET 15
SET 0
SET 1
COMPARATOR
12
17
TAG
0
TAG
0
ENTRY
ENTRY
1
2
3
HIT 3
HIT 2
HIT 1
HIT 0
29
1
PAGE SIZE
DETECT
29
MUX
MUX
HIT
LINE SELECT
PA(11–0)
PA(12)
PA(31–13)
STATUS
MOTOROLA
HIT
19
9

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