mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 318

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

Instruction Execution Timing
10.12 LEA, PEA, AND MOVEM EXECUTION TIMES
Table 10-20 indicates the number of clock cycles required for execution of the LEA, PEA,
and MOVEM instructions. The number of operand read and write cycles is shown in paren-
theses (r/w).
2
10.13 MULTIPRECISION INSTRUCTION EXECUTION TIMES
Table 10-21 indicates the number of clock cycles for execution of the multiprecision instruc-
tions. The number of clock cycles includes the time to fetch both operands, perform the
operations, and store the results. The number of read and write cycles is shown in paren-
theses (r/w).
10.14 STATUS REGISTER, MOVES, AND MISCELLANEOUS
Table 10-22, Table 10-23, and Table 10-24 indicate the number of clock cycles required for
execution of the status register, MOVES, and miscellaneous instructions. The number of
operand read and write cycles is shown in parentheses (r/w). Where indicated, the number
of clock cycles and r/w cycles must be added to those required for effective address calcu-
lation.
10-22
1
“n” is the number of registers being moved.
MOVEM Mem->Reg
MOVEM Reg->Mem
Add 2(1/0) cycles to the (bd,{An,PC},Xi*SF) time for a memory indirect address.
Instruction
INSTRUCTION EXECUTION TIMES
PEA
LEA
Table 10-20. LEA, PEA, and MOVEM Instruction Execution Times
Table 10-21. Multiprecision Instruction Execution Times
1
other instructions.
Where <ea>y,<ea>x is (Ay)+,(Ax)+ for CMPM and –(Ay),–(Ax) for all
1(0/0)
1(0/1)
n(0/n)
Instruction
n
(An)
2
0)
CMPM
(n/
ADDX
SUBX
ABCD
SBCD
“
“
“
(An)
n(n/
0)
—
+
-
-
(An)
n(0/
n)
–
-
-
-
M68060 USER’S MANUAL
Byte, Word
Byte, Word
Byte, Word
(d16,An)
Long
Long
Long
Size
Byte
Byte
n(n/0)
n(0/n)
1(0/0)
2(0/1)
1+n(n/0) 2+n(n/0) 1+n(n/0)
1+n(0/n) 2+n(0/n) 1+n(0/n)
(d8,An,
Xi SF)
1(0/0)
2(0/1)
op Dy,Dx
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
(bd,An,
Xi SF)
—
—
2(0/0)
3(0/1)
1
(xxx).WL (d16,PC)
1(0/0)
1(0/1)
<ea>y,<ea>x
2(2/1)
2(2/1)
2(2/0)
2(2/0)
2(2/1)
2(2/1)
2(2/1)
2(2/1)
op
1(0/0)
1(0/1)
n(n/0)
—
1
1+n(n/0) 2+n(n/0)
(d8,PC,
Xi SF)
1(0/0)
2(0/1)
—
MOTOROLA
(bd,PC,
Xi SF)
2(0/0)
2(0/1)
—
1