isp1760 NXP Semiconductors, isp1760 Datasheet - Page 16

• Manufacturer Part Number: isp1760
• Description: Hi-speed Universal Serial Bus Host Controller For Embedded Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 13257
Product data sheet
Fig 4. Memory segmentation and access block diagram.
USB BUS
AND LOW-SPEED)
USB HIGH-SPEED
TRANSACTION
TRANSLATOR
(FULL-SPEED
HOST AND
7.3 Accessing the ISP1760 Host Controller memory: PIO and DMA
Both the CPU interface logic and the USB Host Controller require access to the internal
ISP1760 RAM at the same time. The internal arbiter controls these accesses to the
internal memory, organized internally on a 64-bit data bus width, allowing a maximum
bandwidth of 240 MB/s. This bandwidth avoids any bottleneck on accesses both from the
CPU interface and the internal USB Host Controller.
The CPU interface of the ISP1760 can be configured for a 16-bit or 32-bit data bus width.
When the ISP1760 is configured for a 16-bit data bus width, the upper unused 16 data
lines must be pulled up to V
together to a single 10 k pull-up resistor. The 16-bit or 32-bit data bus width
configuration is done by programming bit 8 of the HW Mode Control register. This will
determine the register and memory access types in both PIO and DMA modes to all
internal blocks: Host Controller, Peripheral Controller and OTG Controller. All accesses
must be word-aligned for 16-bit mode and double-word aligned for 32-bit mode, where
one word = 16 bits. When accessing the Host Controller registers in 16-bit mode, the
63 kbytes
address
data (64 bits)
control signals
ARBITER
PAYLOAD
PAYLOAD
PTD32
PTD32
PTD32
PTD1
PTD2
PTD1
PTD1
PTD2
PTD2
Rev. 01 — 8 November 2004
240 MB/s
CC(I/O)
ASYNC
PAYLOAD
ISOCHRONOUS
INTERRUPT
. This can be achieved by connecting DATA[31:16] lines
MEMORY MAPPED
INPUT/OUTPUT,
MANAGEMENT
CONTROLLER
INTERRUPT
REGISTERS
SLAVE DMA
Embedded Hi-Speed USB host controller
CONTROL
MEMORY
UNIT,
AND
004aaa436
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
D[15:0]/D[31:0]
DREQ
A[17:1]
WR_N
DACK
RD_N
CS_N
IRQ
ISP1760
PROCESSOR
MICRO-
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