isp1760 NXP Semiconductors, isp1760 Datasheet - Page 50

• Manufacturer Part Number: isp1760
• Description: Hi-speed Universal Serial Bus Host Controller For Embedded Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 54:
[1]
9397 750 13257
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Interrupt register: bit allocation
INT_IRQ
8.4.1 Interrupt register (R/W: 0310h)
8.4 Interrupt registers
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
The bits of this register indicate the interrupt source, defining the events that determined
the INT generation. Clearing the bits that were set because of the events listed is done by
writing back logic 1 to the respective position. All bits must be reset before enabling new
interrupt events. These bits will be set, regardless of the setting of bit GLOBAL_INTR_EN
in the HW Mode Control register.
Table 55:
Bit
31 to 10
9
8
READY
R/W
R/W
R/W
CLK
R/W
30
22
14
0
0
0
6
0
Symbol
-
ISO_IRQ
ATL_IRQ
Interrupt register: bit description
HC_SUSP
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 8 November 2004
reserved
Description
reserved; write logic 0
ISO IRQ: Indicates that an IRQ was asserted because an ISO PTD was
completed, or the PTDs corresponding to the bits set in the ISO IRQ
Mask AND or ISO IRQ Mask OR register bits combination were
completed.
0 — No IRQ assertion determined by the completion of ISO PTDs
1 — IRQ asserted because of completing ISO PTDs.
For details, see
ATL IRQ: Indicates that an IRQ was asserted because an ATL PTD was
completed, or the PTDs corresponding to the bits set in the ATL IRQ
Mask AND or ATL IRQ Mask OR register bits combination were
completed.
0 — No IRQ assertion determined by the completion of ATL PTDs
1 — IRQ asserted because of completing ATL PTD.
For details, see
reserved
[1]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
Table 54
reserved
reserved
[1]
Section
Section
EOTINT
shows the bit allocation of the Interrupt register.
[1]
[1]
DMA
R/W
R/W
R/W
R/W
27
19
11
7.4.
7.4.
0
0
0
3
0
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
reserved
ISO_IRQ
[1]
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
ISP1760
SOFITLINT
ATL_IRQ
R/W
R/W
R/W
R/W
50 of 105
24
16
0
0
8
0
0
0