lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 34

• Manufacturer Part Number: lan91c95
• Description: Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
• Manufacturer: Standard Microsystems Corp.

Note 1: The chart assumes that ECOR Function Enable bit is meaningless in ISA mode.
Note 2: ECSR Power Down bit must not be set to one(1) in ISA mode
POWERDOWN LOGIC
The pins and bits involved in powerdown are:
1.
2.
3.
4.
5.
6.
No.
1
2
3
4
5
Table 6A - ISA MODE Defined States (Refer to table 6B for next states to wake-up events)
PWRDWN/TXCLK - Input pin valid when XENDEC is not zero (0).
Pwrdwn bits in ECSR and MCSR registers - One bit for each function
Enable Function bits in ECOR and MCOR registers - One bit for each function
PWRDN - Ethernet powerdown bit in Control Register.
WAKUP_EN - Magic packet receive enable bit in the Control Register
nWAKEUP - Pin for Magic Packet receive + Ethernet function powerdown
PWRD
Pin(A=
Assrtd)
WN
nA
nA
nA
nA
A
nWAKE
Assrtd)
UP-EN
PIN
(A=
nA
nA
nA
X
A
FUCNTION
ENABLE
ECOR
X
X
X
X
X
CURRENT STATE
POWER
DOWN
ECSR
X
X
0
0
0
0
(*Rev. C and Higher)
PWRD
WN BIT
CTR
X
X
0
0
1
1
34
WAKE-
UP_EN
CTR
BIT
X
X
0
1
0
ENABLE
MCOR
FUNC
X
-
-
-
-
POWER
DOWN
MCSR
X
-
-
-
-
Asserts the
Everything.
POWERS
(nPWDN)
down pin
Ethernet
Ethernet
Ethernet
modem
Tx, Rx,
DOWN
power
also
Link
Tx
Tx
POWER
Ethernet
Ethernet
Ethernet
Rx, Link
Rx, Link
DOWN
Tx, Rx,
DOES
NOT
Link